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Searched refs:cpu_transcoder (Results 1 – 25 of 28) sorted by relevance

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/Linux-v6.1/drivers/gpu/drm/i915/display/
Dintel_vrr.c176 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in intel_vrr_enable() local
192 intel_de_write(dev_priv, TRANS_VRR_VMIN(cpu_transcoder), crtc_state->vrr.vmin - 1); in intel_vrr_enable()
193 intel_de_write(dev_priv, TRANS_VRR_VMAX(cpu_transcoder), crtc_state->vrr.vmax - 1); in intel_vrr_enable()
194 intel_de_write(dev_priv, TRANS_VRR_CTL(cpu_transcoder), trans_vrr_ctl); in intel_vrr_enable()
195 intel_de_write(dev_priv, TRANS_VRR_FLIPLINE(cpu_transcoder), crtc_state->vrr.flipline - 1); in intel_vrr_enable()
196 intel_de_write(dev_priv, TRANS_PUSH(cpu_transcoder), TRANS_PUSH_EN); in intel_vrr_enable()
203 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in intel_vrr_send_push() local
208 intel_de_write(dev_priv, TRANS_PUSH(cpu_transcoder), in intel_vrr_send_push()
216 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in intel_vrr_is_push_sent() local
221 return intel_de_read(dev_priv, TRANS_PUSH(cpu_transcoder)) & TRANS_PUSH_SEND; in intel_vrr_is_push_sent()
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Dintel_vdsc.c345 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in intel_dsc_source_support() local
353 if (DISPLAY_VER(i915) >= 11 && cpu_transcoder != TRANSCODER_A) in intel_dsc_source_support()
359 static bool is_pipe_dsc(struct intel_crtc *crtc, enum transcoder cpu_transcoder) in is_pipe_dsc() argument
366 if (cpu_transcoder == TRANSCODER_EDP || in is_pipe_dsc()
367 cpu_transcoder == TRANSCODER_DSI_0 || in is_pipe_dsc()
368 cpu_transcoder == TRANSCODER_DSI_1) in is_pipe_dsc()
554 intel_dsc_power_domain(struct intel_crtc *crtc, enum transcoder cpu_transcoder) in intel_dsc_power_domain() argument
572 else if (is_pipe_dsc(crtc, cpu_transcoder)) in intel_dsc_power_domain()
583 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in intel_dsc_pps_configure() local
610 if (!is_pipe_dsc(crtc, cpu_transcoder)) { in intel_dsc_pps_configure()
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Dintel_drrs.c69 enum transcoder cpu_transcoder = crtc->drrs.cpu_transcoder; in intel_drrs_set_refresh_rate_pipeconf() local
77 val = intel_de_read(dev_priv, PIPECONF(cpu_transcoder)); in intel_drrs_set_refresh_rate_pipeconf()
84 intel_de_write(dev_priv, PIPECONF(cpu_transcoder), val); in intel_drrs_set_refresh_rate_pipeconf()
91 intel_cpu_transcoder_set_m1_n1(crtc, crtc->drrs.cpu_transcoder, in intel_drrs_set_refresh_rate_m_n()
98 return crtc->drrs.cpu_transcoder != INVALID_TRANSCODER; in intel_drrs_is_active()
109 if (intel_cpu_transcoder_has_m2_n2(dev_priv, crtc->drrs.cpu_transcoder)) in intel_drrs_set_state()
158 crtc->drrs.cpu_transcoder = crtc_state->cpu_transcoder; in intel_drrs_activate()
193 crtc->drrs.cpu_transcoder = INVALID_TRANSCODER; in intel_drrs_deactivate()
298 crtc->drrs.cpu_transcoder = INVALID_TRANSCODER; in intel_crtc_drrs_init()
Dintel_hdcp.c227 enum transcoder cpu_transcoder, enum port port) in intel_hdcp_in_use() argument
230 HDCP_STATUS(dev_priv, cpu_transcoder, port)) & in intel_hdcp_in_use()
235 enum transcoder cpu_transcoder, enum port port) in intel_hdcp2_in_use() argument
238 HDCP2_STATUS(dev_priv, cpu_transcoder, port)) & in intel_hdcp2_in_use()
363 enum transcoder cpu_transcoder, enum port port) in intel_hdcp_get_repeater_ctl() argument
366 switch (cpu_transcoder) { in intel_hdcp_get_repeater_ctl()
381 cpu_transcoder); in intel_hdcp_get_repeater_ctl()
410 enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder; in intel_hdcp_validate_v_prime() local
436 rep_ctl = intel_hdcp_get_repeater_ctl(dev_priv, cpu_transcoder, port); in intel_hdcp_validate_v_prime()
737 enum transcoder cpu_transcoder = connector->hdcp.cpu_transcoder; in intel_hdcp_auth() local
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Dintel_pch_display.c218 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in ilk_pch_transcoder_set_timings() local
221 intel_de_read(dev_priv, HTOTAL(cpu_transcoder))); in ilk_pch_transcoder_set_timings()
223 intel_de_read(dev_priv, HBLANK(cpu_transcoder))); in ilk_pch_transcoder_set_timings()
225 intel_de_read(dev_priv, HSYNC(cpu_transcoder))); in ilk_pch_transcoder_set_timings()
228 intel_de_read(dev_priv, VTOTAL(cpu_transcoder))); in ilk_pch_transcoder_set_timings()
230 intel_de_read(dev_priv, VBLANK(cpu_transcoder))); in ilk_pch_transcoder_set_timings()
232 intel_de_read(dev_priv, VSYNC(cpu_transcoder))); in ilk_pch_transcoder_set_timings()
234 intel_de_read(dev_priv, VSYNCSHIFT(cpu_transcoder))); in ilk_pch_transcoder_set_timings()
515 intel_cpu_transcoder_get_m1_n1(crtc, crtc_state->cpu_transcoder, in ilk_pch_get_config()
551 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in lpt_enable_pch_transcoder() local
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Dintel_ddi.c343 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in intel_ddi_set_dp_msa() local
349 drm_WARN_ON(&dev_priv->drm, transcoder_is_dsi(cpu_transcoder)); in intel_ddi_set_dp_msa()
395 intel_de_write(dev_priv, TRANS_MSA_MISC(cpu_transcoder), temp); in intel_ddi_set_dp_msa()
411 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in intel_ddi_config_transcoder_dp2() local
417 intel_de_write(i915, TRANS_DP2_CTL(cpu_transcoder), val); in intel_ddi_config_transcoder_dp2()
433 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in intel_ddi_transcoder_func_reg_val_get() local
467 if (cpu_transcoder == TRANSCODER_EDP) { in intel_ddi_transcoder_func_reg_val_get()
541 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in intel_ddi_enable_transcoder_func() local
556 TRANS_DDI_FUNC_CTL2(cpu_transcoder), ctl2); in intel_ddi_enable_transcoder_func()
559 intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), in intel_ddi_enable_transcoder_func()
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Dintel_audio.c397 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in hsw_dp_audio_config_update() local
411 tmp = intel_de_read(dev_priv, HSW_AUD_CFG(cpu_transcoder)); in hsw_dp_audio_config_update()
423 intel_de_write(dev_priv, HSW_AUD_CFG(cpu_transcoder), tmp); in hsw_dp_audio_config_update()
425 tmp = intel_de_read(dev_priv, HSW_AUD_M_CTS_ENABLE(cpu_transcoder)); in hsw_dp_audio_config_update()
436 intel_de_write(dev_priv, HSW_AUD_M_CTS_ENABLE(cpu_transcoder), tmp); in hsw_dp_audio_config_update()
445 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in hsw_hdmi_audio_config_update() local
452 tmp = intel_de_read(dev_priv, HSW_AUD_CFG(cpu_transcoder)); in hsw_hdmi_audio_config_update()
469 intel_de_write(dev_priv, HSW_AUD_CFG(cpu_transcoder), tmp); in hsw_hdmi_audio_config_update()
475 tmp = intel_de_read(dev_priv, HSW_AUD_M_CTS_ENABLE(cpu_transcoder)); in hsw_hdmi_audio_config_update()
478 intel_de_write(dev_priv, HSW_AUD_M_CTS_ENABLE(cpu_transcoder), tmp); in hsw_hdmi_audio_config_update()
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Dintel_dp_hdcp.c22 static unsigned int transcoder_to_stream_enc_status(enum transcoder cpu_transcoder) in transcoder_to_stream_enc_status() argument
26 switch (cpu_transcoder) { in transcoder_to_stream_enc_status()
248 enum transcoder cpu_transcoder, in intel_dp_hdcp_toggle_signalling() argument
698 enum transcoder cpu_transcoder = hdcp->stream_transcoder; in intel_dp_mst_hdcp_stream_encryption() local
706 stream_enc_status = transcoder_to_stream_enc_status(cpu_transcoder); in intel_dp_mst_hdcp_stream_encryption()
712 HDCP_STATUS(i915, cpu_transcoder, port), in intel_dp_mst_hdcp_stream_encryption()
717 transcoder_name(cpu_transcoder), enable ? "enabled" : "disabled"); in intel_dp_mst_hdcp_stream_encryption()
732 enum transcoder cpu_transcoder = hdcp->stream_transcoder; in intel_dp_mst_hdcp2_stream_encryption() local
733 enum pipe pipe = (enum pipe)cpu_transcoder; in intel_dp_mst_hdcp2_stream_encryption()
738 !!(intel_de_read(i915, HDCP2_AUTH_STREAM(i915, cpu_transcoder, port)) in intel_dp_mst_hdcp2_stream_encryption()
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Dintel_display.c430 enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder; in intel_wait_for_pipe_off() local
433 if (intel_de_wait_for_clear(dev_priv, PIPECONF(cpu_transcoder), in intel_wait_for_pipe_off()
442 enum transcoder cpu_transcoder, bool state) in assert_transcoder() argument
452 power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder); in assert_transcoder()
455 u32 val = intel_de_read(dev_priv, PIPECONF(cpu_transcoder)); in assert_transcoder()
465 transcoder_name(cpu_transcoder), in assert_transcoder()
533 enum transcoder cpu_transcoder = new_crtc_state->cpu_transcoder; in intel_enable_transcoder() local
558 (enum pipe) cpu_transcoder); in intel_enable_transcoder()
568 reg = PIPECONF(cpu_transcoder); in intel_enable_transcoder()
594 enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder; in intel_disable_transcoder() local
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Dintel_hdmi.c79 enum transcoder cpu_transcoder) in assert_hdmi_transcoder_func_disabled() argument
82 intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder)) & in assert_hdmi_transcoder_func_disabled()
154 enum transcoder cpu_transcoder, in hsw_dip_data_reg() argument
160 return HSW_TVIDEO_DIP_GMP_DATA(cpu_transcoder, i); in hsw_dip_data_reg()
162 return HSW_TVIDEO_DIP_VSC_DATA(cpu_transcoder, i); in hsw_dip_data_reg()
164 return ICL_VIDEO_DIP_PPS_DATA(cpu_transcoder, i); in hsw_dip_data_reg()
166 return HSW_TVIDEO_DIP_AVI_DATA(cpu_transcoder, i); in hsw_dip_data_reg()
168 return HSW_TVIDEO_DIP_SPD_DATA(cpu_transcoder, i); in hsw_dip_data_reg()
170 return HSW_TVIDEO_DIP_VS_DATA(cpu_transcoder, i); in hsw_dip_data_reg()
172 return GLK_TVIDEO_DIP_DRM_DATA(cpu_transcoder, i); in hsw_dip_data_reg()
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Dintel_vdsc.h23 intel_dsc_power_domain(struct intel_crtc *crtc, enum transcoder cpu_transcoder);
Dintel_psr.c213 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in intel_psr_irq_handler() local
227 transcoder_name(cpu_transcoder)); in intel_psr_irq_handler()
234 transcoder_name(cpu_transcoder)); in intel_psr_irq_handler()
238 PSR_EVENT(cpu_transcoder)); in intel_psr_irq_handler()
241 intel_de_write(dev_priv, PSR_EVENT(cpu_transcoder), in intel_psr_irq_handler()
251 transcoder_name(cpu_transcoder)); in intel_psr_irq_handler()
869 if (!transcoder_has_psr2(dev_priv, crtc_state->cpu_transcoder)) { in intel_psr2_config_valid()
872 transcoder_name(crtc_state->cpu_transcoder)); in intel_psr2_config_valid()
1118 enum transcoder cpu_transcoder = intel_dp->psr.transcoder; in intel_psr_enable_source() local
1147 val = intel_de_read(dev_priv, EXITLINE(cpu_transcoder)); in intel_psr_enable_source()
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Dintel_dp_mst.c233 transcoders |= BIT(crtc_state->cpu_transcoder); in intel_dp_mst_transcoder_mask()
407 intel_de_rmw(dev_priv, TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder), in intel_mst_post_disable_dp()
538 enum transcoder trans = pipe_config->cpu_transcoder; in intel_mst_enable_dp()
549 intel_de_write(dev_priv, TRANS_DP2_VFREQHIGH(pipe_config->cpu_transcoder), in intel_mst_enable_dp()
551 intel_de_write(dev_priv, TRANS_DP2_VFREQLOW(pipe_config->cpu_transcoder), in intel_mst_enable_dp()
998 return crtc_state->mst_master_transcoder == crtc_state->cpu_transcoder; in intel_dp_mst_is_master_trans()
1004 crtc_state->mst_master_transcoder != crtc_state->cpu_transcoder; in intel_dp_mst_is_slave_trans()
Dintel_display.h634 enum transcoder cpu_transcoder,
637 enum transcoder cpu_transcoder,
640 enum transcoder cpu_transcoder,
643 enum transcoder cpu_transcoder,
694 enum transcoder cpu_transcoder, bool state);
Dintel_ddi.h66 enum transcoder cpu_transcoder,
Dintel_display_types.h469 enum transcoder cpu_transcoder,
572 enum transcoder cpu_transcoder; member
1052 enum transcoder cpu_transcoder; member
1389 enum transcoder cpu_transcoder; member
Dg4x_dp.c198 assert_transcoder_disabled(dev_priv, pipe_config->cpu_transcoder); in ilk_edp_pll_on()
238 assert_transcoder_disabled(dev_priv, old_crtc_state->cpu_transcoder); in ilk_edp_pll_off()
327 intel_cpu_transcoder_get_m1_n1(crtc, crtc_state->cpu_transcoder, in g4x_dp_get_m_n()
329 intel_cpu_transcoder_get_m2_n2(crtc, crtc_state->cpu_transcoder, in g4x_dp_get_m_n()
Dintel_fdi.c32 enum transcoder cpu_transcoder = (enum transcoder)pipe; in assert_fdi_tx() local
33 cur_state = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder)) & TRANS_DDI_FUNC_ENABLE; in assert_fdi_tx()
390 assert_transcoder_enabled(dev_priv, crtc_state->cpu_transcoder); in ilk_fdi_link_train()
Dintel_dpll.c1554 assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder); in i9xx_enable_pll()
1734 assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder); in vlv_enable_pll()
1886 assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder); in chv_enable_pll()
1947 crtc_state->cpu_transcoder = (enum transcoder)pipe; in vlv_force_pll_on()
2018 assert_transcoder_disabled(dev_priv, crtc_state->cpu_transcoder); in i9xx_disable_pll()
Dintel_crtc_state_dump.c173 transcoder_name(pipe_config->cpu_transcoder), in intel_crtc_state_dump()
Dintel_backlight.c538 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in pch_enable_backlight() local
555 if (cpu_transcoder == TRANSCODER_EDP) in pch_enable_backlight()
558 cpu_ctl2 = BLM_PIPE(cpu_transcoder); in pch_enable_backlight()
Dintel_dp.c1157 if (DISPLAY_VER(dev_priv) == 11 && pipe_config->cpu_transcoder != TRANSCODER_A) in intel_dp_source_supports_fec()
1879 enum transcoder cpu_transcoder) in cpu_transcoder_has_drrs() argument
1884 return intel_cpu_transcoder_has_m2_n2(i915, cpu_transcoder); in cpu_transcoder_has_drrs()
1909 if (!cpu_transcoder_has_drrs(i915, pipe_config->cpu_transcoder)) in can_enable_drrs()
1930 if (intel_cpu_transcoder_has_m2_n2(i915, pipe_config->cpu_transcoder)) in intel_dp_drrs_compute_config()
3254 i915_reg_t reg = HSW_TVIDEO_DIP_CTL(crtc_state->cpu_transcoder); in intel_dp_set_infoframes()
4954 if (!(transcoders & BIT(crtc_state->cpu_transcoder))) in intel_modeset_affected_transcoders()
4967 transcoders &= ~BIT(crtc_state->cpu_transcoder); in intel_modeset_affected_transcoders()
Dintel_pipe_crc.c318 pipe_config->cpu_transcoder == TRANSCODER_EDP) in intel_crtc_crc_setup_workarounds()
Dintel_lspcon.c630 HSW_TVIDEO_DIP_CTL(pipe_config->cpu_transcoder)); in lspcon_infoframes_enabled()
Dintel_crtc.c167 crtc_state->cpu_transcoder = INVALID_TRANSCODER; in intel_crtc_state_reset()

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