Searched refs:cpu_role (Results 1 – 3 of 3) sorted by relevance
203 return !!(mmu->cpu_role. base_or_ext . reg##_##name); \216 return mmu->cpu_role.base.level > 0; in is_cr0_pg()221 return !mmu->cpu_role.base.has_4_byte_gpte; in is_cr4_pae()2254 vcpu->arch.mmu->cpu_role.base.level < PT64_ROOT_4LEVEL && in shadow_walk_init_using_root()3674 if (mmu->cpu_role.base.level == PT32E_ROOT_LEVEL) { in mmu_alloc_shadow_roots()3698 if (mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL) { in mmu_alloc_shadow_roots()3737 if (mmu->cpu_role.base.level == PT32E_ROOT_LEVEL) { in mmu_alloc_shadow_roots()3751 quadrant = (mmu->cpu_role.base.level == PT32_ROOT_LEVEL) ? i : 0; in mmu_alloc_shadow_roots()3787 mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL || in mmu_alloc_special_roots()3892 if (vcpu->arch.mmu->cpu_role.base.level >= PT64_ROOT_4LEVEL) { in kvm_mmu_sync_roots()[all …]
58 #define PT_HAVE_ACCESSED_DIRTY(mmu) (!(mmu)->cpu_role.base.ad_disabled)288 gpte &= level - (PT32_ROOT_LEVEL + mmu->cpu_role.ext.cr4_pse); in FNAME()326 walker->level = mmu->cpu_role.base.level; in FNAME()630 top_level = vcpu->arch.mmu->cpu_role.base.level; in FNAME()
442 union kvm_cpu_role cpu_role; member
