Home
last modified time | relevance | path

Searched refs:chg_pid (Results 1 – 6 of 6) sorted by relevance

/Linux-v6.1/drivers/clk/at91/
Dsama5d2.c121 int chg_pid; member
123 { .n = "flx0_gclk", .id = 19, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
124 { .n = "flx1_gclk", .id = 20, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
125 { .n = "flx2_gclk", .id = 21, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
126 { .n = "flx3_gclk", .id = 22, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
127 { .n = "flx4_gclk", .id = 23, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
128 { .n = "uart0_gclk", .id = 24, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
129 { .n = "uart1_gclk", .id = 25, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
130 { .n = "uart2_gclk", .id = 26, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
131 { .n = "uart3_gclk", .id = 27, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
[all …]
Dclk-generated.c32 int chg_pid; member
152 if (gck->chg_pid == i) in clk_generated_determine_rate()
186 if (gck->chg_pid < 0) in clk_generated_determine_rate()
189 parent = clk_hw_get_parent_by_index(hw, gck->chg_pid); in clk_generated_determine_rate()
324 int chg_pid) in at91_clk_register_generated() argument
340 if (chg_pid >= 0) in at91_clk_register_generated()
348 gck->chg_pid = chg_pid; in at91_clk_register_generated()
Dclk-peripheral.c42 int chg_pid; member
295 if (periph->chg_pid < 0) in clk_sam9x5_peripheral_determine_rate()
299 parent = clk_hw_get_parent_by_index(hw, periph->chg_pid); in clk_sam9x5_peripheral_determine_rate()
448 int chg_pid) in at91_clk_register_sam9x5_peripheral() argument
465 if (chg_pid < 0) { in at91_clk_register_sam9x5_peripheral()
483 periph->chg_pid = chg_pid; in at91_clk_register_sam9x5_peripheral()
Dpmc.h148 const struct clk_range *range, int chg_pid);
192 int chg_pid);
202 int chg_pid);
Dclk-master.c36 int chg_pid; member
612 if (master->chg_pid < 0) in clk_sama7g5_master_determine_rate()
615 parent = clk_hw_get_parent_by_index(hw, master->chg_pid); in clk_sama7g5_master_determine_rate()
811 bool critical, int chg_pid) in at91_clk_sama7g5_register_master() argument
833 if (chg_pid >= 0) in at91_clk_sama7g5_register_master()
841 master->chg_pid = chg_pid; in at91_clk_sama7g5_register_master()
Ddt-compat.c153 int chg_pid = INT_MIN; in of_sama5d2_clk_generated_setup() local
170 chg_pid = GCK_INDEX_DT_AUDIO_PLL; in of_sama5d2_clk_generated_setup()
176 chg_pid); in of_sama5d2_clk_generated_setup()