Searched refs:cdclk_state (Results 1 – 8 of 8) sorted by relevance
2324 static int intel_compute_min_cdclk(struct intel_cdclk_state *cdclk_state) in intel_compute_min_cdclk() argument2326 struct intel_atomic_state *state = cdclk_state->base.state; in intel_compute_min_cdclk()2341 if (cdclk_state->min_cdclk[crtc->pipe] == min_cdclk) in intel_compute_min_cdclk()2344 cdclk_state->min_cdclk[crtc->pipe] = min_cdclk; in intel_compute_min_cdclk()2346 ret = intel_atomic_lock_global_state(&cdclk_state->base); in intel_compute_min_cdclk()2355 if (cdclk_state->bw_min_cdclk != min_cdclk) { in intel_compute_min_cdclk()2358 cdclk_state->bw_min_cdclk = min_cdclk; in intel_compute_min_cdclk()2360 ret = intel_atomic_lock_global_state(&cdclk_state->base); in intel_compute_min_cdclk()2366 min_cdclk = max(cdclk_state->force_min_cdclk, in intel_compute_min_cdclk()2367 cdclk_state->bw_min_cdclk); in intel_compute_min_cdclk()[all …]
237 const struct intel_cdclk_state *cdclk_state; in hsw_ips_compute_config() local239 cdclk_state = intel_atomic_get_cdclk_state(state); in hsw_ips_compute_config()240 if (IS_ERR(cdclk_state)) in hsw_ips_compute_config()241 return PTR_ERR(cdclk_state); in hsw_ips_compute_config()244 if (crtc_state->pixel_rate > cdclk_state->logical.cdclk * 95 / 100) in hsw_ips_compute_config()
35 struct intel_cdclk_state *cdclk_state = in intel_crtc_disable_noatomic() local102 cdclk_state->min_cdclk[pipe] = 0; in intel_crtc_disable_noatomic()103 cdclk_state->min_voltage_level[pipe] = 0; in intel_crtc_disable_noatomic()104 cdclk_state->active_pipes &= ~BIT(pipe); in intel_crtc_disable_noatomic()418 struct intel_cdclk_state *cdclk_state = in intel_modeset_readout_hw_state() local453 cdclk_state->active_pipes = active_pipes; in intel_modeset_readout_hw_state()597 cdclk_state->min_cdclk[crtc->pipe] = min_cdclk; in intel_modeset_readout_hw_state()598 cdclk_state->min_voltage_level[crtc->pipe] = in intel_modeset_readout_hw_state()
254 const struct intel_cdclk_state *cdclk_state; in intel_plane_calc_min_cdclk() local279 cdclk_state = intel_atomic_get_cdclk_state(state); in intel_plane_calc_min_cdclk()280 if (IS_ERR(cdclk_state)) in intel_plane_calc_min_cdclk()281 return PTR_ERR(cdclk_state); in intel_plane_calc_min_cdclk()292 cdclk_state->min_cdclk[crtc->pipe]) in intel_plane_calc_min_cdclk()300 cdclk_state->min_cdclk[crtc->pipe]); in intel_plane_calc_min_cdclk()
899 const struct intel_cdclk_state *cdclk_state; in intel_bw_calc_min_cdclk() local944 cdclk_state = intel_atomic_get_cdclk_state(state); in intel_bw_calc_min_cdclk()945 if (IS_ERR(cdclk_state)) in intel_bw_calc_min_cdclk()946 return PTR_ERR(cdclk_state); in intel_bw_calc_min_cdclk()956 if (new_min_cdclk <= cdclk_state->bw_min_cdclk) in intel_bw_calc_min_cdclk()961 new_min_cdclk, cdclk_state->bw_min_cdclk); in intel_bw_calc_min_cdclk()
986 struct intel_cdclk_state *cdclk_state; in glk_force_audio_cdclk_commit() local994 cdclk_state = intel_atomic_get_cdclk_state(state); in glk_force_audio_cdclk_commit()995 if (IS_ERR(cdclk_state)) in glk_force_audio_cdclk_commit()996 return PTR_ERR(cdclk_state); in glk_force_audio_cdclk_commit()998 cdclk_state->force_min_cdclk = enable ? 2 * 96000 : 0; in glk_force_audio_cdclk_commit()
1159 const struct intel_cdclk_state *cdclk_state; in intel_fbc_check_plane() local1161 cdclk_state = intel_atomic_get_cdclk_state(state); in intel_fbc_check_plane()1162 if (IS_ERR(cdclk_state)) in intel_fbc_check_plane()1163 return PTR_ERR(cdclk_state); in intel_fbc_check_plane()1165 if (crtc_state->pixel_rate >= cdclk_state->logical.cdclk * 95 / 100) { in intel_fbc_check_plane()
4762 const struct intel_cdclk_state *cdclk_state) in hsw_ips_linetime_wm() argument4772 cdclk_state->logical.cdclk); in hsw_ips_linetime_wm()4805 const struct intel_cdclk_state *cdclk_state; in hsw_compute_linetime_wm() local4815 cdclk_state = intel_atomic_get_cdclk_state(state); in hsw_compute_linetime_wm()4816 if (IS_ERR(cdclk_state)) in hsw_compute_linetime_wm()4817 return PTR_ERR(cdclk_state); in hsw_compute_linetime_wm()4820 cdclk_state); in hsw_compute_linetime_wm()8374 struct intel_cdclk_state *cdclk_state; in intel_modeset_init_hw() local8379 cdclk_state = to_intel_cdclk_state(i915->display.cdclk.obj.state); in intel_modeset_init_hw()8383 cdclk_state->logical = cdclk_state->actual = i915->display.cdclk.hw; in intel_modeset_init_hw()
