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Searched refs:bases (Results 1 – 25 of 26) sorted by relevance

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/Linux-v6.1/drivers/clk/ux500/
Du8500_of_clk.c131 u32 bases[CLKRST_MAX]; in u8500_clk_init() local
144 for (i = 0; i < ARRAY_SIZE(bases); i++) { in u8500_clk_init()
151 bases[i] = r.start; in u8500_clk_init()
303 clk = clk_reg_prcc_pclk("p1_pclk0", "per1clk", bases[CLKRST1_INDEX], in u8500_clk_init()
307 clk = clk_reg_prcc_pclk("p1_pclk1", "per1clk", bases[CLKRST1_INDEX], in u8500_clk_init()
311 clk = clk_reg_prcc_pclk("p1_pclk2", "per1clk", bases[CLKRST1_INDEX], in u8500_clk_init()
315 clk = clk_reg_prcc_pclk("p1_pclk3", "per1clk", bases[CLKRST1_INDEX], in u8500_clk_init()
319 clk = clk_reg_prcc_pclk("p1_pclk4", "per1clk", bases[CLKRST1_INDEX], in u8500_clk_init()
323 clk = clk_reg_prcc_pclk("p1_pclk5", "per1clk", bases[CLKRST1_INDEX], in u8500_clk_init()
327 clk = clk_reg_prcc_pclk("p1_pclk6", "per1clk", bases[CLKRST1_INDEX], in u8500_clk_init()
[all …]
/Linux-v6.1/drivers/gpu/drm/nouveau/dispnv50/
Dbase.c33 } bases[] = { in nv50_base_new() local
46 cid = nvif_mclass(&disp->disp->object, bases); in nv50_base_new()
52 return bases[cid].new(drm, head, bases[cid].oclass, pwndw); in nv50_base_new()
/Linux-v6.1/include/linux/
Dposix-timers.h130 struct posix_cputimer_base bases[CPUCLOCK_MAX]; member
148 pct->bases[0].nextevt = U64_MAX; in posix_cputimers_init()
149 pct->bases[1].nextevt = U64_MAX; in posix_cputimers_init()
150 pct->bases[2].nextevt = U64_MAX; in posix_cputimers_init()
158 pct->bases[CPUCLOCK_SCHED].nextevt = runtime; in posix_cputimers_rt_watchdog()
174 .bases = INIT_CPU_TIMERBASES(s.posix_cputimers.bases), \
/Linux-v6.1/drivers/gpu/host1x/
Dsyncpt.c25 struct host1x_syncpt_base *bases = host->bases; in host1x_syncpt_base_request() local
29 if (!bases[i].requested) in host1x_syncpt_base_request()
35 bases[i].requested = true; in host1x_syncpt_base_request()
36 return &bases[i]; in host1x_syncpt_base_request()
330 struct host1x_syncpt_base *bases; in host1x_syncpt_init() local
339 bases = devm_kcalloc(host->dev, host->info->nb_bases, sizeof(*bases), in host1x_syncpt_init()
341 if (!bases) in host1x_syncpt_init()
350 bases[i].id = i; in host1x_syncpt_init()
354 host->bases = bases; in host1x_syncpt_init()
Ddev.h129 struct host1x_syncpt_base *bases; member
/Linux-v6.1/drivers/iommu/
Drockchip-iommu.c108 void __iomem **bases; member
352 writel(command, iommu->bases[i] + RK_MMU_COMMAND); in rk_iommu_command()
372 rk_iommu_write(iommu->bases[i], RK_MMU_ZAP_ONE_LINE, iova); in rk_iommu_zap_lines()
382 active &= !!(rk_iommu_read(iommu->bases[i], RK_MMU_STATUS) & in rk_iommu_is_stall_active()
394 enable &= !!(rk_iommu_read(iommu->bases[i], RK_MMU_STATUS) & in rk_iommu_is_paging_enabled()
406 done &= rk_iommu_read(iommu->bases[i], RK_MMU_DTE_ADDR) == 0; in rk_iommu_is_reset_done()
431 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS)); in rk_iommu_enable_stall()
452 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS)); in rk_iommu_disable_stall()
473 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS)); in rk_iommu_enable_paging()
494 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS)); in rk_iommu_disable_paging()
[all …]
/Linux-v6.1/drivers/iommu/arm/arm-smmu/
Darm-smmu-nvidia.c36 void __iomem *bases[MAX_SMMU_INSTANCES]; member
52 return nvidia_smmu->bases[inst] + (page << smmu->pgshift); in nvidia_smmu_page()
324 nvidia_smmu->bases[0] = smmu->base; in nvidia_smmu_impl_init()
332 nvidia_smmu->bases[i] = devm_ioremap_resource(dev, res); in nvidia_smmu_impl_init()
333 if (IS_ERR(nvidia_smmu->bases[i])) in nvidia_smmu_impl_init()
334 return ERR_CAST(nvidia_smmu->bases[i]); in nvidia_smmu_impl_init()
/Linux-v6.1/kernel/time/
Dposix-cpu-timers.c28 pct->bases[CPUCLOCK_PROF].nextevt = cpu_limit * NSEC_PER_SEC; in posix_cputimers_group_init()
154 return !(~pct->bases[CPUCLOCK_PROF].nextevt | in expiry_cache_is_inactive()
155 ~pct->bases[CPUCLOCK_VIRT].nextevt | in expiry_cache_is_inactive()
156 ~pct->bases[CPUCLOCK_SCHED].nextevt); in expiry_cache_is_inactive()
423 return tsk->posix_cputimers.bases + clkidx; in timer_base()
425 return tsk->signal->posix_cputimers.bases + clkidx; in timer_base()
534 cleanup_timerqueue(&pct->bases[CPUCLOCK_PROF].tqhead); in cleanup_timers()
535 cleanup_timerqueue(&pct->bases[CPUCLOCK_VIRT].tqhead); in cleanup_timers()
536 cleanup_timerqueue(&pct->bases[CPUCLOCK_SCHED].tqhead); in cleanup_timers()
860 struct posix_cputimer_base *base = pct->bases; in collect_posix_cputimers()
[all …]
Dtick-internal.h176 void clock_was_set(unsigned int bases);
Dhrtimer.c945 void clock_was_set(unsigned int bases) in clock_was_set() argument
967 if (update_needs_ipi(cpu_base, bases)) in clock_was_set()
/Linux-v6.1/arch/x86/boot/
Dearly_serial_console.c77 static const int bases[] = { 0x3f8, 0x2f8 }; in parse_earlyprintk() local
86 port = bases[idx]; in parse_earlyprintk()
/Linux-v6.1/drivers/gpu/drm/exynos/
Dexynos_drm_scaler.c155 static unsigned int bases[] = { in scaler_set_src_base() local
163 scaler_write(src_buf->dma_addr[i], bases[i]); in scaler_set_src_base()
218 static unsigned int bases[] = { in scaler_set_dst_base() local
226 scaler_write(dst_buf->dma_addr[i], bases[i]); in scaler_set_dst_base()
/Linux-v6.1/arch/x86/kernel/
Dearly_printk.c162 static const int __initconst bases[] = { 0x3f8, 0x2f8 }; in early_serial_init() local
169 early_serial_base = bases[port]; in early_serial_init()
/Linux-v6.1/Documentation/devicetree/bindings/interrupt-controller/
Dmediatek,sysirq.txt31 mapped region. Could be multiple bases here. Ex: mt6797 needs 2 reg, others
/Linux-v6.1/drivers/net/wireless/broadcom/b43/
Dpio.c82 static const u16 bases[] = { in index_to_pioqueue_base() local
105 B43_WARN_ON(index >= ARRAY_SIZE(bases)); in index_to_pioqueue_base()
106 return bases[index]; in index_to_pioqueue_base()
/Linux-v6.1/drivers/platform/mellanox/
DKconfig33 are defined per system type bases and include the registers related
/Linux-v6.1/drivers/gpu/drm/msm/
DNOTES58 register interface is same, just different bases.)
/Linux-v6.1/sound/pci/hda/
Dhda_proc.c249 static const char * const bases[7] = { in get_jack_location() local
266 return bases[cfg & 0x0f]; in get_jack_location()
/Linux-v6.1/drivers/gpu/drm/i915/gt/
Dintel_engine_cs.c334 const struct engine_mmio_base *bases) in __engine_mmio_base() argument
339 if (GRAPHICS_VER(i915) >= bases[i].graphics_ver) in __engine_mmio_base()
343 GEM_BUG_ON(!bases[i].base); in __engine_mmio_base()
345 return bases[i].base; in __engine_mmio_base()
/Linux-v6.1/Documentation/timers/
Dhighres.rst169 decision is made per timer base and synchronized across per-cpu timer bases in
171 clock event devices for the per-CPU timer bases, but currently only one
/Linux-v6.1/Documentation/driver-api/thermal/
Dcpu-idle-cooling.rst89 The implementation of the cooling device bases the number of states on
/Linux-v6.1/Documentation/x86/
Dintel_txt.rst68 static root of trust must be used. This bases trust in BIOS
/Linux-v6.1/Documentation/filesystems/
Dvfat.rst204 **nostale_ro**: This option bases the *inode* number and filehandle
/Linux-v6.1/drivers/media/usb/gspca/
DKconfig437 Say Y here if you want support for Xirlink C-It bases cameras.
/Linux-v6.1/drivers/firmware/cirrus/
Dcs_dsp.c1912 __be32 bases[] = { xm_base, xm_base, ym_base, ym_base }; in cs_dsp_halo_create_regions() local
1914 return cs_dsp_create_regions(dsp, id, ver, ARRAY_SIZE(types), types, bases); in cs_dsp_halo_create_regions()

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