Searched refs:apic_base (Results 1 – 14 of 14) sorted by relevance
125 sregs.apic_base = 1 << 10; in main()128 sregs.apic_base); in main()129 sregs.apic_base = 1 << 11; in main()132 sregs.apic_base); in main()
154 run->s.regs.sregs.apic_base = 1 << 11; in main()167 TEST_ASSERT(run->s.regs.sregs.apic_base == 1 << 11, in main()169 run->s.regs.sregs.apic_base); in main()
194 return apic->vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE; in kvm_apic_hw_enabled()219 return apic->vcpu->arch.apic_base & X2APIC_ENABLE; in apic_x2apic_mode()267 static inline enum lapic_mode kvm_apic_mode(u64 apic_base) in kvm_apic_mode() argument269 return apic_base & (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE); in kvm_apic_mode()
2318 if (!(vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE)) in kvm_free_lapic()2373 u64 old_value = vcpu->arch.apic_base; in kvm_lapic_set_base()2376 vcpu->arch.apic_base = value; in kvm_lapic_set_base()2405 apic->base_address = apic->vcpu->arch.apic_base & in kvm_lapic_set_base()2607 vcpu->arch.apic_base = MSR_IA32_APICBASE_ENABLE; in kvm_create_lapic()2751 kvm_lapic_set_base(vcpu, vcpu->arch.apic_base); in kvm_apic_set_state()
262 vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE); in __kvm_update_cpuid_runtime()
465 return vcpu->arch.apic_base; in kvm_get_apic_base()9775 kvm_run->apic_base = kvm_get_apic_base(vcpu); in post_kvm_run_save()11321 sregs->apic_base = kvm_get_apic_base(vcpu); in __get_sregs_common()11494 apic_base_msr.data = sregs->apic_base; in __set_sregs_common()12341 return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0; in kvm_vcpu_is_bsp()
158 __u64 apic_base; member169 __u64 apic_base; member
304 __u64 apic_base; member
105 sregs->cr8, sregs->efer, sregs->apic_base); in sregs_dump()
680 u64 apic_base; member
845 if (CC(vcpu->arch.apic_base & X2APIC_ENABLE && e->index >> 8 == 0x8)) in nested_vmx_msr_check_common()
477 __u64 apic_base;5566 __u64 apic_base;5993 __u64 apic_base;
