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Searched refs:WREG32_SMC_P (Results 1 – 4 of 4) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/amdgpu/
Dsi.c1871 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, 0, ~UPLL_CTLREQ_MASK); in si_vce_send_vcepll_ctlreq()
1876 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, UPLL_CTLREQ_MASK, ~UPLL_CTLREQ_MASK); in si_vce_send_vcepll_ctlreq()
1888 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, 0, ~UPLL_CTLREQ_MASK); in si_vce_send_vcepll_ctlreq()
1904 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL_2, in si_set_vce_clocks()
1909 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, VCEPLL_BYPASS_EN_MASK, in si_set_vce_clocks()
1914 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, VCEPLL_SLEEP_MASK, in si_set_vce_clocks()
1926 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL_5, 0, ~RESET_ANTI_MUX_MASK); in si_set_vce_clocks()
1929 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, VCEPLL_VCO_MODE_MASK, in si_set_vce_clocks()
1933 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, VCEPLL_SLEEP_MASK, in si_set_vce_clocks()
1935 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, 0, ~VCEPLL_SLEEP_MASK); in si_set_vce_clocks()
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Damdgpu.h1186 #define WREG32_SMC_P(_Reg, _Val, _Mask) \ macro
/Linux-v6.1/drivers/gpu/drm/radeon/
Dsi.c7476 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, 0, ~UPLL_CTLREQ_MASK); in si_vce_send_vcepll_ctlreq()
7481 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, UPLL_CTLREQ_MASK, ~UPLL_CTLREQ_MASK); in si_vce_send_vcepll_ctlreq()
7492 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, 0, ~UPLL_CTLREQ_MASK); in si_vce_send_vcepll_ctlreq()
7508 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL_2, in si_set_vce_clocks()
7513 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, VCEPLL_BYPASS_EN_MASK, in si_set_vce_clocks()
7518 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, VCEPLL_SLEEP_MASK, in si_set_vce_clocks()
7530 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL_5, 0, ~RESET_ANTI_MUX_MASK); in si_set_vce_clocks()
7533 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, VCEPLL_VCO_MODE_MASK, in si_set_vce_clocks()
7537 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, VCEPLL_SLEEP_MASK, in si_set_vce_clocks()
7539 WREG32_SMC_P(CG_VCEPLL_FUNC_CNTL, 0, ~VCEPLL_SLEEP_MASK); in si_set_vce_clocks()
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Dradeon.h2588 #define WREG32_SMC_P(reg, val, mask) \ macro