Searched refs:WREG32_RLC (Results 1 – 4 of 4) sorted by relevance
| /Linux-v6.1/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_amdkfd_gfx_v9.c | 93 WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmSH_MEM_CONFIG), sh_mem_config); in kgd_gfx_v9_program_sh_mem_settings() 94 WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmSH_MEM_BASES), sh_mem_bases); in kgd_gfx_v9_program_sh_mem_settings() 239 WREG32_RLC(reg, mqd_hqd[reg - hqd_base]); in kgd_gfx_v9_hqd_load() 245 WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL), data); in kgd_gfx_v9_hqd_load() 274 WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_LO), in kgd_gfx_v9_hqd_load() 276 WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_HI), in kgd_gfx_v9_hqd_load() 278 WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR), in kgd_gfx_v9_hqd_load() 280 WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI), in kgd_gfx_v9_hqd_load() 287 WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_EOP_RPTR), in kgd_gfx_v9_hqd_load() 292 WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_ACTIVE), data); in kgd_gfx_v9_hqd_load() [all …]
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| D | soc15_common.h | 115 #define WREG32_RLC(reg, value) \ macro
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| D | soc15.c | 493 WREG32_RLC(reg, tmp); in soc15_program_register_sequence()
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| D | gfx_v9_0.c | 2522 WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmRLC_CSIB_ADDR_HI), in gfx_v9_0_init_csb() 2524 WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmRLC_CSIB_ADDR_LO), in gfx_v9_0_init_csb() 2526 WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmRLC_CSIB_LENGTH), in gfx_v9_0_init_csb()
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