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Searched refs:UVD_CGC_CTRL__UDEC_RE_MODE_MASK (Results 1 – 20 of 20) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_sh_mask.h444 #define UVD_CGC_CTRL__UDEC_RE_MODE_MASK macro
Duvd_3_1_sh_mask.h227 #define UVD_CGC_CTRL__UDEC_RE_MODE_MASK 0x800 macro
Duvd_4_0_sh_mask.h72 #define UVD_CGC_CTRL__UDEC_RE_MODE_MASK 0x00000800L macro
Duvd_4_2_sh_mask.h227 #define UVD_CGC_CTRL__UDEC_RE_MODE_MASK 0x800 macro
Duvd_5_0_sh_mask.h249 #define UVD_CGC_CTRL__UDEC_RE_MODE_MASK 0x800 macro
Duvd_6_0_sh_mask.h251 #define UVD_CGC_CTRL__UDEC_RE_MODE_MASK 0x800 macro
/Linux-v6.1/drivers/gpu/drm/amd/amdgpu/
Dvcn_v4_0.c674 data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK in vcn_v4_0_disable_clock_gating()
759 reg_data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK | in vcn_v4_0_disable_clock_gating_dpg_mode()
817 data |= (UVD_CGC_CTRL__UDEC_RE_MODE_MASK in vcn_v4_0_enable_clock_gating()
Dvcn_v1_0.c503 data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK in vcn_v1_0_disable_clock_gating()
603 data |= (UVD_CGC_CTRL__UDEC_RE_MODE_MASK in vcn_v1_0_enable_clock_gating()
661 reg_data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK | in vcn_v1_0_clock_gating_dpg_mode()
Dvcn_v2_0.c528 data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK in vcn_v2_0_disable_clock_gating()
604 reg_data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK | in vcn_v2_0_clock_gating_dpg_mode()
665 data |= (UVD_CGC_CTRL__UDEC_RE_MODE_MASK in vcn_v2_0_enable_clock_gating()
Duvd_v5_0.c691 data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK | in uvd_v5_0_set_sw_clock_gating()
Dvcn_v2_5.c598 data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK in vcn_v2_5_disable_clock_gating()
675 reg_data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK | in vcn_v2_5_clock_gating_dpg_mode()
737 data |= (UVD_CGC_CTRL__UDEC_RE_MODE_MASK in vcn_v2_5_enable_clock_gating()
Dvcn_v3_0.c736 data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK in vcn_v3_0_disable_clock_gating()
835 reg_data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK | in vcn_v3_0_clock_gating_dpg_mode()
894 data |= (UVD_CGC_CTRL__UDEC_RE_MODE_MASK in vcn_v3_0_enable_clock_gating()
Duvd_v6_0.c1348 data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK | in uvd_v6_0_set_sw_clock_gating()
Duvd_v7_0.c1630 data &= ~(UVD_CGC_CTRL__UDEC_RE_MODE_MASK |
/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h937 #define UVD_CGC_CTRL__UDEC_RE_MODE_MASK macro
Dvcn_2_5_sh_mask.h2005 #define UVD_CGC_CTRL__UDEC_RE_MODE_MASK macro
Dvcn_2_0_0_sh_mask.h1956 #define UVD_CGC_CTRL__UDEC_RE_MODE_MASK macro
Dvcn_2_6_0_sh_mask.h3676 #define UVD_CGC_CTRL__UDEC_RE_MODE_MASK macro
Dvcn_3_0_0_sh_mask.h2735 #define UVD_CGC_CTRL__UDEC_RE_MODE_MASK macro
Dvcn_4_0_0_sh_mask.h113 #define UVD_CGC_CTRL__UDEC_RE_MODE_MASK macro