Searched refs:TIMER_CTL_REG (Results 1 – 2 of 2) sorted by relevance
30 #define TIMER_CTL_REG(val) (0x10 * val + 0x10) macro58 u32 val = readl(base + TIMER_CTL_REG(timer)); in sun4i_clkevt_time_stop()59 writel(val & ~TIMER_CTL_ENABLE, base + TIMER_CTL_REG(timer)); in sun4i_clkevt_time_stop()72 u32 val = readl(base + TIMER_CTL_REG(timer)); in sun4i_clkevt_time_start()80 base + TIMER_CTL_REG(timer)); in sun4i_clkevt_time_start()179 timer_of_base(&to) + TIMER_CTL_REG(1)); in sun4i_timer_init()201 timer_of_base(&to) + TIMER_CTL_REG(0)); in sun4i_timer_init()
26 #define TIMER_CTL_REG(val) (0x20 * (val) + 0x10) macro80 u32 val = readl(ce->timer.base + TIMER_CTL_REG(timer)); in sun5i_clkevt_time_stop()81 writel(val & ~TIMER_CTL_ENABLE, ce->timer.base + TIMER_CTL_REG(timer)); in sun5i_clkevt_time_stop()93 u32 val = readl(ce->timer.base + TIMER_CTL_REG(timer)); in sun5i_clkevt_time_start()101 ce->timer.base + TIMER_CTL_REG(timer)); in sun5i_clkevt_time_start()221 base + TIMER_CTL_REG(1)); in sun5i_setup_clocksource()
