Searched refs:TGL_TRANS_CLK_SEL_PORT (Results 1 – 2 of 2) sorted by relevance
914 val = TGL_TRANS_CLK_SEL_PORT(phy); in intel_ddi_enable_pipe_clock()916 val = TGL_TRANS_CLK_SEL_PORT(encoder->port); in intel_ddi_enable_pipe_clock()
7083 #define TGL_TRANS_CLK_SEL_PORT(x) (((x) + 1) << 28) macro
