Searched refs:TEGRA186_SID_NVENC (Results 1 – 3 of 3) sorted by relevance
15 #define TEGRA186_SID_NVENC 0x07 macro
226 .sid = TEGRA186_SID_NVENC,256 .sid = TEGRA186_SID_NVENC,
1735 iommus = <&smmu TEGRA186_SID_NVENC>;