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Searched refs:TEGRA124_CLK_PLL_P (Results 1 – 8 of 8) sorted by relevance

/Linux-v6.1/drivers/clk/tegra/
Dclk-tegra124.c873 [tegra_clk_pll_p] = { .dt_id = TEGRA124_CLK_PLL_P, .present = true },
945 { .con_id = "pll_p", .dt_id = TEGRA124_CLK_PLL_P },
1291 { TEGRA124_CLK_UARTA, TEGRA124_CLK_PLL_P, 408000000, 0 },
1292 { TEGRA124_CLK_UARTB, TEGRA124_CLK_PLL_P, 408000000, 0 },
1293 { TEGRA124_CLK_UARTC, TEGRA124_CLK_PLL_P, 408000000, 0 },
1294 { TEGRA124_CLK_UARTD, TEGRA124_CLK_PLL_P, 408000000, 0 },
1303 { TEGRA124_CLK_HOST1X, TEGRA124_CLK_PLL_P, 136000000, 1 },
1304 { TEGRA124_CLK_DSIALP, TEGRA124_CLK_PLL_P, 68000000, 0 },
1305 { TEGRA124_CLK_DSIBLP, TEGRA124_CLK_PLL_P, 68000000, 0 },
1307 { TEGRA124_CLK_DFLL_SOC, TEGRA124_CLK_PLL_P, 51000000, 1 },
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/cpufreq/
Dnvidia,tegra124-cpufreq.txt33 <&tegra_car TEGRA124_CLK_PLL_P>,
/Linux-v6.1/include/dt-bindings/clock/
Dtegra124-car-common.h239 #define TEGRA124_CLK_PLL_P 211 macro
/Linux-v6.1/arch/arm/boot/dts/
Dtegra124-nyan-blaze-emc.dtsi10 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
17 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
24 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
31 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
38 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
45 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
Dtegra124-apalis-emc.dtsi15 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
22 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
29 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
36 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
43 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
50 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
Dtegra124-jetson-tk1-emc.dtsi10 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
17 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
24 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
31 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
38 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
45 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
Dtegra124-nyan-big-emc.dtsi14 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
21 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
28 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
35 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
42 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
49 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
95 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
102 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
109 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
116 clocks = <&tegra_car TEGRA124_CLK_PLL_P>;
[all …]
Dtegra124.dtsi1202 <&tegra_car TEGRA124_CLK_PLL_P>,