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Searched refs:SRII (Results 1 – 25 of 30) sorted by relevance

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/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dce/
Ddce_clock_source.h60 SRII(PHASE, DP_DTO, 0),\
61 SRII(PHASE, DP_DTO, 1),\
62 SRII(PHASE, DP_DTO, 2),\
63 SRII(PHASE, DP_DTO, 3),\
64 SRII(PHASE, DP_DTO, 4),\
65 SRII(PHASE, DP_DTO, 5),\
66 SRII(MODULO, DP_DTO, 0),\
67 SRII(MODULO, DP_DTO, 1),\
68 SRII(MODULO, DP_DTO, 2),\
69 SRII(MODULO, DP_DTO, 3),\
[all …]
Ddce_hwseq.h39 SRII(DCFE_CLOCK_CONTROL, DCFE, 0), \
40 SRII(DCFE_CLOCK_CONTROL, DCFE, 1), \
41 SRII(DCFE_CLOCK_CONTROL, DCFE, 2), \
42 SRII(DCFE_CLOCK_CONTROL, DCFE, 3), \
43 SRII(DCFE_CLOCK_CONTROL, DCFE, 4), \
44 SRII(DCFE_CLOCK_CONTROL, DCFE, 5), \
48 SRII(BLND_V_UPDATE_LOCK, BLND, 0), \
49 SRII(BLND_V_UPDATE_LOCK, BLND, 1), \
50 SRII(BLND_V_UPDATE_LOCK, BLND, 2), \
51 SRII(BLND_V_UPDATE_LOCK, BLND, 3), \
[all …]
/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dcn32/
Ddcn32_mpc.h36 SRII(MPCC_MOVABLE_CM_LOCATION_CONTROL, MPCC, inst),\
37 SRII(MPCC_MCM_SHAPER_CONTROL, MPCC_MCM, inst),\
38 SRII(MPCC_MCM_SHAPER_OFFSET_R, MPCC_MCM, inst),\
39 SRII(MPCC_MCM_SHAPER_OFFSET_G, MPCC_MCM, inst),\
40 SRII(MPCC_MCM_SHAPER_OFFSET_B, MPCC_MCM, inst),\
41 SRII(MPCC_MCM_SHAPER_SCALE_R, MPCC_MCM, inst),\
42 SRII(MPCC_MCM_SHAPER_SCALE_G_B, MPCC_MCM, inst),\
43 SRII(MPCC_MCM_SHAPER_LUT_INDEX, MPCC_MCM, inst),\
44 SRII(MPCC_MCM_SHAPER_LUT_DATA, MPCC_MCM, inst),\
45 SRII(MPCC_MCM_SHAPER_LUT_WRITE_EN_MASK, MPCC_MCM, inst),\
[all …]
Ddcn32_resource.h774 SRII(MUX, MPC_OUT, inst), VUPDATE_SRII(CUR, VUPDATE_LOCK_SET, inst) \
779 MPC_OUT_MUX_COMMON_REG_LIST_DCN1_0_RI(inst), SRII(CSC_MODE, MPC_OUT, inst), \
780 SRII(CSC_C11_C12_A, MPC_OUT, inst), SRII(CSC_C33_C34_A, MPC_OUT, inst), \
781 SRII(CSC_C11_C12_B, MPC_OUT, inst), SRII(CSC_C33_C34_B, MPC_OUT, inst), \
782 SRII(DENORM_CONTROL, MPC_OUT, inst), \
783 SRII(DENORM_CLAMP_G_Y, MPC_OUT, inst), \
784 SRII(DENORM_CLAMP_B_CB, MPC_OUT, inst), SR(MPC_OUT_CSC_COEF_FORMAT) \
789 SRII(MPCC_TOP_SEL, MPCC, inst), SRII(MPCC_BOT_SEL, MPCC, inst), \
790 SRII(MPCC_CONTROL, MPCC, inst), SRII(MPCC_STATUS, MPCC, inst), \
791 SRII(MPCC_OPP_ID, MPCC, inst), SRII(MPCC_BG_G_Y, MPCC, inst), \
[all …]
Ddcn32_resource.c154 #define SRII(reg_name, block, id)\ macro
536 SRII(PIXEL_RATE_CNTL, OTG, 0), \
537 SRII(PIXEL_RATE_CNTL, OTG, 1),\
538 SRII(PIXEL_RATE_CNTL, OTG, 2),\
539 SRII(PIXEL_RATE_CNTL, OTG, 3),\
540 SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 0),\
541 SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 1),\
542 SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 2),\
543 SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 3),\
/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_mpc.h35 SRII(MPCC_TOP_GAIN, MPCC, inst),\
36 SRII(MPCC_BOT_GAIN_INSIDE, MPCC, inst),\
37 SRII(MPCC_BOT_GAIN_OUTSIDE, MPCC, inst),\
38 SRII(MPCC_OGAM_RAMA_START_CNTL_B, MPCC_OGAM, inst),\
39 SRII(MPCC_OGAM_RAMA_START_CNTL_G, MPCC_OGAM, inst),\
40 SRII(MPCC_OGAM_RAMA_START_CNTL_R, MPCC_OGAM, inst),\
41 SRII(MPCC_OGAM_RAMA_SLOPE_CNTL_B, MPCC_OGAM, inst),\
42 SRII(MPCC_OGAM_RAMA_SLOPE_CNTL_G, MPCC_OGAM, inst),\
43 SRII(MPCC_OGAM_RAMA_SLOPE_CNTL_R, MPCC_OGAM, inst),\
44 SRII(MPCC_OGAM_RAMA_END_CNTL1_B, MPCC_OGAM, inst),\
[all …]
Ddcn20_dwb.h49 #define SRII(reg_name, block, id)\ macro
/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_mpc.h47 SRII(MPCC_TOP_GAIN, MPCC, inst),\
48 SRII(MPCC_BOT_GAIN_INSIDE, MPCC, inst),\
49 SRII(MPCC_BOT_GAIN_OUTSIDE, MPCC, inst),\
50 SRII(MPCC_MEM_PWR_CTRL, MPCC, inst),\
51 SRII(MPCC_OGAM_LUT_INDEX, MPCC_OGAM, inst),\
52 SRII(MPCC_OGAM_LUT_DATA, MPCC_OGAM, inst), \
53 SRII(MPCC_GAMUT_REMAP_COEF_FORMAT, MPCC_OGAM, inst),\
54 SRII(MPCC_GAMUT_REMAP_MODE, MPCC_OGAM, inst),\
55 SRII(MPC_GAMUT_REMAP_C11_C12_A, MPCC_OGAM, inst),\
56 SRII(MPC_GAMUT_REMAP_C33_C34_A, MPCC_OGAM, inst),\
[all …]
/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_mpc.h34 SRII(MPCC_TOP_SEL, MPCC, inst),\
35 SRII(MPCC_BOT_SEL, MPCC, inst),\
36 SRII(MPCC_CONTROL, MPCC, inst),\
37 SRII(MPCC_STATUS, MPCC, inst),\
38 SRII(MPCC_OPP_ID, MPCC, inst),\
39 SRII(MPCC_BG_G_Y, MPCC, inst),\
40 SRII(MPCC_BG_R_CR, MPCC, inst),\
41 SRII(MPCC_BG_B_CB, MPCC, inst),\
42 SRII(MPCC_SM_CONTROL, MPCC, inst),\
43 SRII(MPCC_UPDATE_LOCK_SEL, MPCC, inst)
[all …]
Ddcn10_dwb.h45 #define SRII(reg_name, block, id)\ macro
/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dcn314/
Ddcn314_resource.c175 #define SRII(reg_name, block, id)\ macro
707 SRII(PIXEL_RATE_CNTL, OTG, 0), \
708 SRII(PIXEL_RATE_CNTL, OTG, 1),\
709 SRII(PIXEL_RATE_CNTL, OTG, 2),\
710 SRII(PIXEL_RATE_CNTL, OTG, 3),\
711 SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 0),\
712 SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 1),\
713 SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 2),\
714 SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 3),\
/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dcn315/
Ddcn315_resource.c176 #define SRII(reg_name, block, id)\ macro
683 SRII(PIXEL_RATE_CNTL, OTG, 0), \
684 SRII(PIXEL_RATE_CNTL, OTG, 1),\
685 SRII(PIXEL_RATE_CNTL, OTG, 2),\
686 SRII(PIXEL_RATE_CNTL, OTG, 3),\
687 SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 0),\
688 SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 1),\
689 SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 2),\
690 SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 3),\
/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dcn316/
Ddcn316_resource.c167 #define SRII(reg_name, block, id)\ macro
683 SRII(PIXEL_RATE_CNTL, OTG, 0), \
684 SRII(PIXEL_RATE_CNTL, OTG, 1),\
685 SRII(PIXEL_RATE_CNTL, OTG, 2),\
686 SRII(PIXEL_RATE_CNTL, OTG, 3),\
687 SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 0),\
688 SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 1),\
689 SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 2),\
690 SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 3),\
/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dcn321/
Ddcn321_resource.c157 #define SRII(reg_name, block, id)\ macro
534 SRII(PIXEL_RATE_CNTL, OTG, 0), \
535 SRII(PIXEL_RATE_CNTL, OTG, 1),\
536 SRII(PIXEL_RATE_CNTL, OTG, 2),\
537 SRII(PIXEL_RATE_CNTL, OTG, 3),\
538 SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 0),\
539 SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 1),\
540 SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 2),\
541 SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 3),\
/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_resource.c144 #define SRII(reg_name, block, id)\ macro
686 SRII(PIXEL_RATE_CNTL, OTG, 0), \
687 SRII(PIXEL_RATE_CNTL, OTG, 1),\
688 SRII(PIXEL_RATE_CNTL, OTG, 2),\
689 SRII(PIXEL_RATE_CNTL, OTG, 3),\
690 SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 0),\
691 SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 1),\
692 SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 2),\
693 SRII(PHYPLL_PIXEL_RATE_CNTL, OTG, 3),\
Ddcn31_hpo_dp_link_encoder.h68 SRII(RDPCSTX_PHY_CNTL6, RDPCSTX, id)
/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dce100/
Ddce100_resource.c487 #define SRII(reg_name, block, id)\ macro
/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dce120/
Ddce120_resource.c772 #define SRII(reg_name, block, id)\ macro
/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dcn201/
Ddcn201_resource.c263 #define SRII(reg_name, block, id)\ macro
/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dce80/
Ddce80_resource.c610 #define SRII(reg_name, block, id)\ macro
/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dce112/
Ddce112_resource.c517 #define SRII(reg_name, block, id)\ macro
/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dce60/
Ddce60_resource.c607 #define SRII(reg_name, block, id)\ macro
/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dcn302/
Ddcn302_resource.c197 #define SRII(reg_name, block, id)\ macro
/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dcn303/
Ddcn303_resource.c176 #define SRII(reg_name, block, id)\ macro
/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dce110/
Ddce110_resource.c539 #define SRII(reg_name, block, id)\ macro

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