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Searched refs:SPI_RESOURCE_RESERVE_CU_5__VGPR__SHIFT (Results 1 – 11 of 11) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h8952 #define SPI_RESOURCE_RESERVE_CU_5__VGPR__SHIFT 0x0 macro
Dgfx_8_0_sh_mask.h10572 #define SPI_RESOURCE_RESERVE_CU_5__VGPR__SHIFT 0x0 macro
Dgfx_8_1_sh_mask.h10970 #define SPI_RESOURCE_RESERVE_CU_5__VGPR__SHIFT 0x0 macro
/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h12457 #define SPI_RESOURCE_RESERVE_CU_5__VGPR__SHIFT … macro
Dgc_9_1_sh_mask.h13761 #define SPI_RESOURCE_RESERVE_CU_5__VGPR__SHIFT … macro
Dgc_9_2_1_sh_mask.h13626 #define SPI_RESOURCE_RESERVE_CU_5__VGPR__SHIFT … macro
Dgc_9_4_2_sh_mask.h25051 #define SPI_RESOURCE_RESERVE_CU_5__VGPR__SHIFT … macro
Dgc_11_0_0_sh_mask.h26231 #define SPI_RESOURCE_RESERVE_CU_5__VGPR__SHIFT … macro
Dgc_10_1_0_sh_mask.h19708 #define SPI_RESOURCE_RESERVE_CU_5__VGPR__SHIFT … macro
Dgc_11_0_3_sh_mask.h28735 #define SPI_RESOURCE_RESERVE_CU_5__VGPR__SHIFT … macro
Dgc_10_3_0_sh_mask.h18072 #define SPI_RESOURCE_RESERVE_CU_5__VGPR__SHIFT … macro