Searched refs:SOF_HDA_ADSP_REG_CL_SD_BDLPU (Results 1 – 4 of 4) sorted by relevance
425 sd_offset + SOF_HDA_ADSP_REG_CL_SD_BDLPU, in hda_dsp_iccmax_stream_hw_params()441 sd_offset + SOF_HDA_ADSP_REG_CL_SD_BDLPU, in hda_dsp_iccmax_stream_hw_params()540 sd_offset + SOF_HDA_ADSP_REG_CL_SD_BDLPU, in hda_dsp_stream_hw_params()628 sd_offset + SOF_HDA_ADSP_REG_CL_SD_BDLPU, in hda_dsp_stream_hw_params()
186 sd_offset + SOF_HDA_ADSP_REG_CL_SD_BDLPU, 0); in cl_skl_cldma_stream_clear()246 sd_offset + SOF_HDA_ADSP_REG_CL_SD_BDLPU, in cl_skl_cldma_setup_controller()
268 sd_offset + SOF_HDA_ADSP_REG_CL_SD_BDLPU, 0); in hda_cl_cleanup()
135 #define SOF_HDA_ADSP_REG_CL_SD_BDLPU 0x1C macro