Searched refs:SDMA0_PHASE0_QUANTUM__VALUE__SHIFT (Results 1 – 16 of 16) sorted by relevance
355 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT)) { in cik_ctx_switch_enable()362 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT); in cik_ctx_switch_enable()370 value << SDMA0_PHASE0_QUANTUM__VALUE__SHIFT | in cik_ctx_switch_enable()
564 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT)) { in sdma_v3_0_ctx_switch_enable()571 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT); in sdma_v3_0_ctx_switch_enable()579 value << SDMA0_PHASE0_QUANTUM__VALUE__SHIFT | in sdma_v3_0_ctx_switch_enable()
462 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT)) { in sdma_v5_2_ctx_switch_enable()469 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT); in sdma_v5_2_ctx_switch_enable()477 value << SDMA0_PHASE0_QUANTUM__VALUE__SHIFT | in sdma_v5_2_ctx_switch_enable()
632 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT)) { in sdma_v5_0_ctx_switch_enable()639 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT); in sdma_v5_0_ctx_switch_enable()647 value << SDMA0_PHASE0_QUANTUM__VALUE__SHIFT | in sdma_v5_0_ctx_switch_enable()
989 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT)) { in sdma_v4_0_ctx_switch_enable()996 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT); in sdma_v4_0_ctx_switch_enable()1004 value << SDMA0_PHASE0_QUANTUM__VALUE__SHIFT | in sdma_v4_0_ctx_switch_enable()
596 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT … macro
597 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro
605 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT … macro
599 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT … macro
1014 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro
1104 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro
1124 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro
1630 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro
292 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT … macro
311 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT … macro
312 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT … macro
