Searched refs:SDMA0_PHASE0_QUANTUM__VALUE_MASK (Results 1 – 16 of 16) sorted by relevance
354 while (value > (SDMA0_PHASE0_QUANTUM__VALUE_MASK >> in cik_ctx_switch_enable()361 value = (SDMA0_PHASE0_QUANTUM__VALUE_MASK >> in cik_ctx_switch_enable()
563 while (value > (SDMA0_PHASE0_QUANTUM__VALUE_MASK >> in sdma_v3_0_ctx_switch_enable()570 value = (SDMA0_PHASE0_QUANTUM__VALUE_MASK >> in sdma_v3_0_ctx_switch_enable()
461 while (value > (SDMA0_PHASE0_QUANTUM__VALUE_MASK >> in sdma_v5_2_ctx_switch_enable()468 value = (SDMA0_PHASE0_QUANTUM__VALUE_MASK >> in sdma_v5_2_ctx_switch_enable()
631 while (value > (SDMA0_PHASE0_QUANTUM__VALUE_MASK >> in sdma_v5_0_ctx_switch_enable()638 value = (SDMA0_PHASE0_QUANTUM__VALUE_MASK >> in sdma_v5_0_ctx_switch_enable()
988 while (value > (SDMA0_PHASE0_QUANTUM__VALUE_MASK >> in sdma_v4_0_ctx_switch_enable()995 value = (SDMA0_PHASE0_QUANTUM__VALUE_MASK >> in sdma_v4_0_ctx_switch_enable()
599 #define SDMA0_PHASE0_QUANTUM__VALUE_MASK … macro
600 #define SDMA0_PHASE0_QUANTUM__VALUE_MASK 0x00FFFF00L macro
608 #define SDMA0_PHASE0_QUANTUM__VALUE_MASK … macro
602 #define SDMA0_PHASE0_QUANTUM__VALUE_MASK … macro
1013 #define SDMA0_PHASE0_QUANTUM__VALUE_MASK 0xffff00 macro
1103 #define SDMA0_PHASE0_QUANTUM__VALUE_MASK 0xffff00 macro
1123 #define SDMA0_PHASE0_QUANTUM__VALUE_MASK 0xffff00 macro
1629 #define SDMA0_PHASE0_QUANTUM__VALUE_MASK 0xffff00 macro
295 #define SDMA0_PHASE0_QUANTUM__VALUE_MASK … macro
314 #define SDMA0_PHASE0_QUANTUM__VALUE_MASK … macro
315 #define SDMA0_PHASE0_QUANTUM__VALUE_MASK … macro