Searched refs:SDMA0_PHASE0_QUANTUM__UNIT__SHIFT (Results 1 – 16 of 16) sorted by relevance
360 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT)) { in cik_ctx_switch_enable()364 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT); in cik_ctx_switch_enable()371 unit << SDMA0_PHASE0_QUANTUM__UNIT__SHIFT; in cik_ctx_switch_enable()
569 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT)) { in sdma_v3_0_ctx_switch_enable()573 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT); in sdma_v3_0_ctx_switch_enable()580 unit << SDMA0_PHASE0_QUANTUM__UNIT__SHIFT; in sdma_v3_0_ctx_switch_enable()
467 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT)) { in sdma_v5_2_ctx_switch_enable()471 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT); in sdma_v5_2_ctx_switch_enable()478 unit << SDMA0_PHASE0_QUANTUM__UNIT__SHIFT; in sdma_v5_2_ctx_switch_enable()
637 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT)) { in sdma_v5_0_ctx_switch_enable()641 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT); in sdma_v5_0_ctx_switch_enable()648 unit << SDMA0_PHASE0_QUANTUM__UNIT__SHIFT; in sdma_v5_0_ctx_switch_enable()
994 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT)) { in sdma_v4_0_ctx_switch_enable()998 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT); in sdma_v4_0_ctx_switch_enable()1005 unit << SDMA0_PHASE0_QUANTUM__UNIT__SHIFT; in sdma_v4_0_ctx_switch_enable()
595 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT … macro
596 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT 0x0 macro
604 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT … macro
598 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT … macro
1012 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT 0x0 macro
1102 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT 0x0 macro
1122 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT 0x0 macro
1628 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT 0x0 macro
291 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT … macro
310 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT … macro
311 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT … macro
