Searched refs:S3C_EP0CR (Results 1 – 1 of 1) sorted by relevance
63 #define S3C_EP0CR S3C_HSUDC_REG(0x28) /* EP0 Control */ macro462 offset = (ep_index(hsep)) ? S3C_ECR : S3C_EP0CR; in s3c_hsudc_set_halt()650 ecr = readl(hsudc->regs + S3C_EP0CR); in s3c_hsudc_handle_ep0_intr()652 writel(ecr, hsudc->regs + S3C_EP0CR); in s3c_hsudc_handle_ep0_intr()1006 writel(0, hsudc->regs + S3C_EP0CR); in s3c_hsudc_reconfig()
