Home
last modified time | relevance | path

Searched refs:RTS (Results 1 – 25 of 64) sorted by relevance

123

/Linux-v6.1/arch/arm64/boot/dts/freescale/
Dimx8mm-venice-gw72xx-0x-rs232-rts.dts5 * GW72xx RS232 with RTS/CTS hardware flow control:
7 * - UART4_TX becomes RTS
Dimx8mm-venice-gw73xx-0x-rs232-rts.dts5 * GW73xx RS232 with RTS/CTS hardware flow control:
7 * - UART4_TX becomes RTS
Dimx8mq-hummingboard-pulse.dts166 * reconfigured to enable RTS/CTS on UART3
209 * Header. To use RTS/CTS on UART3 comment them out
/Linux-v6.1/Documentation/driver-api/serial/
Dserial-rs485.rst20 toggling RTS or DTR signals. That can be used to control external
72 /* Set logical level for RTS pin equal to 1 when sending: */
74 /* or, set logical level for RTS pin equal to 0 when sending: */
77 /* Set logical level for RTS pin equal to 1 after sending: */
79 /* or, set logical level for RTS pin equal to 0 after sending: */
/Linux-v6.1/arch/arm/boot/dts/
Dam335x-netcom-plus-2xx.dts26 AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0) /* RTS */
39 AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* RTS */
Dimx6ul-ccimx6ulsbcpro.dts62 /* CAN2 is multiplexed with UART2 RTS/CTS */
201 /* UART2 RTS/CTS muxed with CAN2 */
209 /* UART3 RTS/CTS muxed with CAN 1 */
Dste-dbx5x0-pinctrl.dtsi21 pins = "GPIO1_AJ3", "GPIO3_AH3"; /* RTS+TXD */
32 pins = "GPIO1_AJ3"; /* RTS */
79 pins = "GPIO7_AG5"; /* RTS */
90 pins = "GPIO7_AG5"; /* RTS */
Dstm32mp157a-iot-box.dts57 /* Note: HW flow control is broken, hence using custom CTS/RTS gpios */
/Linux-v6.1/drivers/net/hamradio/
Dscc.c524 if((scc->wreg[5] & RTS) && scc->kiss.fulldup == KISS_DUPLEX_HALF) in scc_rxint()
938 scc->wreg[R5] |= RTS; in scc_key_trx()
940 or(scc,R5,RTS|TxENAB); /* set the RTS line and enable TX */ in scc_key_trx()
943 cl(scc,R5,RTS|TxENAB); in scc_key_trx()
972 scc->wreg[R5] |= RTS; in scc_key_trx()
974 or(scc,R5,RTS|TxENAB); /* enable tx */ in scc_key_trx()
977 cl(scc,R5,RTS|TxENAB); /* disable tx */ in scc_key_trx()
1110 if ( (grp1 & TXGROUP) && (scc2->wreg[R5] & RTS) ) in is_grouped()
1155 if ( !(scc->wreg[R5] & RTS) ) in t_dwait()
1346 if ( !(scc->wreg[R5] & RTS) ) in scc_set_param()
[all …]
Dz8530.h90 #define RTS 0x2 /* RTS */ macro
/Linux-v6.1/arch/arm64/boot/dts/allwinner/
Dsun50i-a64-orangepi-win.dts382 /* On Pi-2 connector, RTS/CTS optional */
389 /* On Pi-2 connector, RTS/CTS optional */
396 /* On Pi-2 connector (labeled for SPI1), RTS/CTS optional */
Dsun50i-a64-pine64.dts285 /* On Wifi/BT connector, with RTS/CTS */
306 /* On Euler connector, RTS/CTS optional */
Dsun50i-a64-sopine-baseboard.dts192 /* On Euler connector, RTS/CTS optional */
/Linux-v6.1/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
Dserial.txt14 CTS, RTS, DCD, DSR, DTR, and RI.
/Linux-v6.1/Documentation/devicetree/bindings/serial/
Dcirrus,clps711x-uart.txt11 - {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD
/Linux-v6.1/drivers/tty/serial/
Dzs.h143 #define RTS 0x2 /* RTS */ macro
Dsunzilog.h117 #define RTS 0x2 /* RTS */ macro
Dip22zilog.h125 #define RTS 0x2 /* RTS */ macro
Dpmac_zilog.c544 set_bits |= RTS; in pmz_set_mctrl()
546 clear_bits |= RTS; in pmz_set_mctrl()
777 write_zsreg(uap, 5, Tx8 | RTS); in pmz_fix_zero_bug_scc()
841 uap->curregs[R5] = Tx8 | RTS; in __pmz_startup()
1905 write_zsreg(uap, R5, uap->curregs[5] | TxENABLE | RTS | DTR); in pmz_console_write()
Dpmac_zilog.h205 #define RTS 0x2 /* RTS */ macro
/Linux-v6.1/Documentation/hwmon/
Dsbtsi_temp.rst38 and physical interface of a typical 8-pin remote temperature sensor (RTS) on
/Linux-v6.1/arch/arm64/boot/dts/renesas/
Drzg2lc-smarc-pinfunction.dtsi62 <RZG2L_PORT_PINMUX(41, 1, 1)>; /* RTS# */
Drzg2l-smarc-pinfunction.dtsi65 <RZG2L_PORT_PINMUX(48, 4, 1)>; /* RTS# */
/Linux-v6.1/arch/arm64/boot/dts/qcom/
Dsc7180-idp.dts557 /* We'll drive RTS, so no pull */
639 * Configure pull-down on RTS. As RTS is active low
Dsc7280-idp.dtsi694 /* We'll drive RTS, so no pull */
801 * Configure pull-down on RTS. As RTS is active low

123