Searched refs:RS9_REG_SR_3V0_DIF (Results 1 – 1 of 1) sorted by relevance
35 #define RS9_REG_SR_3V0_DIF(n) BIT((n) + 1) macro165 rs9->clk_dif_sr |= RS9_REG_SR_3V0_DIF(idx); in rs9_get_output_config()181 rs9->clk_dif_sr |= RS9_REG_SR_3V0_DIF(idx); in rs9_get_output_config()252 if (rs9->clk_dif_sr & RS9_REG_SR_3V0_DIF(i)) in rs9_update_config()255 regmap_update_bits(rs9->regmap, RS9_REG_SR, RS9_REG_SR_3V0_DIF(i), in rs9_update_config()256 rs9->clk_dif_sr & RS9_REG_SR_3V0_DIF(i)); in rs9_update_config()
