Searched refs:RREG64_PCIE (Results 1 – 6 of 6) sorted by relevance
82 reg_value = RREG64_PCIE((mc_umc_addr + umc_reg_offset) * 4); in umc_v6_7_query_error_status_helper()89 reg_value = RREG64_PCIE((mc_umc_addr + umc_reg_offset) * 4); in umc_v6_7_query_error_status_helper()96 reg_value = RREG64_PCIE((mc_umc_addr + umc_reg_offset) * 4); in umc_v6_7_query_error_status_helper()316 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v6_7_query_correctable_error_count()334 err_addr = RREG64_PCIE((mc_umc_addrt0 + umc_reg_offset) * 4); in umc_v6_7_query_correctable_error_count()361 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v6_7_querry_uncorrectable_error_count()470 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v6_7_query_error_address()484 err_addr = RREG64_PCIE((mc_umc_addrt0 + umc_reg_offset) * 4); in umc_v6_7_query_error_address()
34 uint64_t mc_status = RREG64_PCIE(mc_status_addr); in amdgpu_mca_query_correctable_error_count()45 uint64_t mc_status = RREG64_PCIE(mc_status_addr); in amdgpu_mca_query_uncorrectable_error_count()
114 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v8_10_query_correctable_error_count()130 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v8_10_query_uncorrectable_error_count()218 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v8_10_query_error_address()241 err_addr = RREG64_PCIE((mc_umc_addrt0 + umc_reg_offset) * 4); in umc_v8_10_query_error_address()
219 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v6_1_query_correctable_error_count()244 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v6_1_querry_uncorrectable_error_count()319 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v6_1_query_error_address()334 err_addr = RREG64_PCIE((mc_umc_addrt0 + umc_reg_offset) * 4); in umc_v6_1_query_error_address()
274 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v8_7_query_correctable_error_count()291 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v8_7_querry_uncorrectable_error_count()339 mc_umc_status = RREG64_PCIE((mc_umc_status_addr + umc_reg_offset) * 4); in umc_v8_7_query_error_address()354 err_addr = RREG64_PCIE((mc_umc_addrt0 + umc_reg_offset) * 4); in umc_v8_7_query_error_address()
1155 #define RREG64_PCIE(reg) adev->pcie_rreg64(adev, (reg)) macro
