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Searched refs:RLC_CNTL__RLC_ENABLE_F32_MASK (Results 1 – 17 of 17) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/amdgpu/
Dgfx_v6_0.c2444 if (data & RLC_CNTL__RLC_ENABLE_F32_MASK) { in gfx_v6_0_halt_rlc()
2445 data &= ~RLC_CNTL__RLC_ENABLE_F32_MASK; in gfx_v6_0_halt_rlc()
2464 WREG32(mmRLC_CNTL, RLC_CNTL__RLC_ENABLE_F32_MASK); in gfx_v6_0_rlc_start()
Dgfx_v7_0.c3374 if (data & RLC_CNTL__RLC_ENABLE_F32_MASK) { in gfx_v7_0_halt_rlc()
3377 data &= ~RLC_CNTL__RLC_ENABLE_F32_MASK; in gfx_v7_0_halt_rlc()
3452 WREG32(mmRLC_CNTL, RLC_CNTL__RLC_ENABLE_F32_MASK); in gfx_v7_0_rlc_start()
Dgfx_v9_0.c4621 if (!(rlc_setting & RLC_CNTL__RLC_ENABLE_F32_MASK)) in gfx_v9_0_is_rlc_enabled()
Dgfx_v8_0.c5557 if (!(rlc_setting & RLC_CNTL__RLC_ENABLE_F32_MASK)) in gfx_v8_0_is_rlc_enabled()
Dgfx_v10_0.c5522 if (tmp & RLC_CNTL__RLC_ENABLE_F32_MASK) { in gfx_v10_0_rlc_backdoor_autoload_enable()
/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h7094 #define RLC_CNTL__RLC_ENABLE_F32_MASK 0x00000001L macro
Dgfx_7_2_sh_mask.h7667 #define RLC_CNTL__RLC_ENABLE_F32_MASK 0x1 macro
Dgfx_8_0_sh_mask.h8477 #define RLC_CNTL__RLC_ENABLE_F32_MASK 0x1 macro
Dgfx_8_1_sh_mask.h9031 #define RLC_CNTL__RLC_ENABLE_F32_MASK 0x1 macro
/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h22729 #define RLC_CNTL__RLC_ENABLE_F32_MASK … macro
Dgc_9_1_sh_mask.h24020 #define RLC_CNTL__RLC_ENABLE_F32_MASK … macro
Dgc_9_2_1_sh_mask.h24023 #define RLC_CNTL__RLC_ENABLE_F32_MASK … macro
Dgc_9_4_2_sh_mask.h21497 #define RLC_CNTL__RLC_ENABLE_F32_MASK … macro
Dgc_11_0_0_sh_mask.h34022 #define RLC_CNTL__RLC_ENABLE_F32_MASK … macro
Dgc_10_1_0_sh_mask.h33073 #define RLC_CNTL__RLC_ENABLE_F32_MASK … macro
Dgc_11_0_3_sh_mask.h37265 #define RLC_CNTL__RLC_ENABLE_F32_MASK … macro
Dgc_10_3_0_sh_mask.h32074 #define RLC_CNTL__RLC_ENABLE_F32_MASK … macro