Home
last modified time | relevance | path

Searched refs:RESPONSE_INTERRUPT_COUNT__N_RESPONSE_INTERRUPT_COUNT_MASK (Results 1 – 14 of 14) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_8_0_sh_mask.h11509 #define RESPONSE_INTERRUPT_COUNT__N_RESPONSE_INTERRUPT_COUNT_MASK 0xff macro
Ddce_11_0_sh_mask.h12617 #define RESPONSE_INTERRUPT_COUNT__N_RESPONSE_INTERRUPT_COUNT_MASK 0xff macro
Ddce_10_0_sh_mask.h12611 #define RESPONSE_INTERRUPT_COUNT__N_RESPONSE_INTERRUPT_COUNT_MASK 0xff macro
Ddce_11_2_sh_mask.h13233 #define RESPONSE_INTERRUPT_COUNT__N_RESPONSE_INTERRUPT_COUNT_MASK 0xff macro
Ddce_12_0_sh_mask.h56084 #define RESPONSE_INTERRUPT_COUNT__N_RESPONSE_INTERRUPT_COUNT_MASK … macro
/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h27113 #define RESPONSE_INTERRUPT_COUNT__N_RESPONSE_INTERRUPT_COUNT_MASK … macro
Ddcn_3_2_1_sh_mask.h47853 #define RESPONSE_INTERRUPT_COUNT__N_RESPONSE_INTERRUPT_COUNT_MASK … macro
Ddcn_3_0_1_sh_mask.h225 #define RESPONSE_INTERRUPT_COUNT__N_RESPONSE_INTERRUPT_COUNT_MASK … macro
Ddcn_1_0_sh_mask.h957 #define RESPONSE_INTERRUPT_COUNT__N_RESPONSE_INTERRUPT_COUNT_MASK … macro
Ddcn_3_1_5_sh_mask.h51054 #define RESPONSE_INTERRUPT_COUNT__N_RESPONSE_INTERRUPT_COUNT_MASK … macro
Ddcn_3_0_2_sh_mask.h54157 #define RESPONSE_INTERRUPT_COUNT__N_RESPONSE_INTERRUPT_COUNT_MASK … macro
Ddcn_3_0_0_sh_mask.h62732 #define RESPONSE_INTERRUPT_COUNT__N_RESPONSE_INTERRUPT_COUNT_MASK … macro
Ddcn_2_0_0_sh_mask.h59156 #define RESPONSE_INTERRUPT_COUNT__N_RESPONSE_INTERRUPT_COUNT_MASK … macro
Ddcn_3_2_0_sh_mask.h47855 #define RESPONSE_INTERRUPT_COUNT__N_RESPONSE_INTERRUPT_COUNT_MASK … macro