Searched refs:REG_DSI_28nm_PHY_PLL_GLB_CFG (Results 1 – 2 of 2) sorted by relevance
| /Linux-v6.1/drivers/gpu/drm/msm/dsi/phy/ |
| D | dsi_phy_28nm.c | 305 dsi_phy_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 1); in _dsi_pll_28nm_vco_prepare_hpm()
308 dsi_phy_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 200); in _dsi_pll_28nm_vco_prepare_hpm()
311 dsi_phy_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 500); in _dsi_pll_28nm_vco_prepare_hpm()
314 dsi_phy_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 600); in _dsi_pll_28nm_vco_prepare_hpm()
335 dsi_phy_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 1); in _dsi_pll_28nm_vco_prepare_hpm()
338 dsi_phy_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 200); in _dsi_pll_28nm_vco_prepare_hpm()
341 dsi_phy_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 250); in _dsi_pll_28nm_vco_prepare_hpm()
344 dsi_phy_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 200); in _dsi_pll_28nm_vco_prepare_hpm()
347 dsi_phy_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 500); in _dsi_pll_28nm_vco_prepare_hpm()
350 dsi_phy_write_udelay(base + REG_DSI_28nm_PHY_PLL_GLB_CFG, val, 600); in _dsi_pll_28nm_vco_prepare_hpm()
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| /Linux-v6.1/drivers/gpu/drm/msm/dsi/ |
| D | dsi_phy_28nm.xml.h | 254 #define REG_DSI_28nm_PHY_PLL_GLB_CFG 0x00000020 macro
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