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Searched refs:R9A07G043_CLK_P0_DIV2 (Results 1 – 3 of 3) sorted by relevance

/Linux-v6.1/drivers/clk/renesas/
Dr9a07g043-cpg.c19 LAST_DT_CORE_CLK = R9A07G043_CLK_P0_DIV2,
116 DEF_FIXED("P0_DIV2", R9A07G043_CLK_P0_DIV2, R9A07G043_CLK_P0, 1, 2),
/Linux-v6.1/include/dt-bindings/clock/
Dr9a07g043-cpg.h29 #define R9A07G043_CLK_P0_DIV2 18 macro
/Linux-v6.1/arch/arm64/boot/dts/renesas/
Dr9a07g043.dtsi384 <&cpg CPG_CORE R9A07G043_CLK_P0_DIV2>,
387 assigned-clocks = <&cpg CPG_CORE R9A07G043_CLK_P0_DIV2>;