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Searched refs:Pin (Results 1 – 25 of 93) sorted by relevance

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/Linux-v6.1/arch/arm64/boot/dts/freescale/
Dimx8mq-nitrogen.dts369 MX8MQ_IOMUXC_SAI1_RXFS_GPIO4_IO0 0x19 /* Pin 19 */
370 MX8MQ_IOMUXC_SAI1_RXC_GPIO4_IO1 0x19 /* Pin 21 */
371 MX8MQ_IOMUXC_SAI1_RXD1_GPIO4_IO3 0x19 /* Pin 23 */
372 MX8MQ_IOMUXC_SAI1_RXD2_GPIO4_IO4 0x19 /* Pin 25 */
373 MX8MQ_IOMUXC_SAI1_RXD3_GPIO4_IO5 0x19 /* Pin 27 */
374 MX8MQ_IOMUXC_SAI1_RXD4_GPIO4_IO6 0x19 /* Pin 29 */
375 MX8MQ_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x19 /* Pin 31 */
376 MX8MQ_IOMUXC_SAI1_RXD6_GPIO4_IO8 0x19 /* Pin 33 */
377 MX8MQ_IOMUXC_SAI1_RXD7_GPIO4_IO9 0x19 /* Pin 35 */
378 MX8MQ_IOMUXC_SAI1_TXD1_GPIO4_IO13 0x19 /* Pin 39 */
[all …]
/Linux-v6.1/arch/arm/boot/dts/
Dmeson8b-odroidc1.dts234 "J2 Header Pin 35", "J2 Header Pin 36",
235 "J2 Header Pin 32", "J2 Header Pin 31",
236 "J2 Header Pin 29", "J2 Header Pin 18",
237 "J2 Header Pin 22", "J2 Header Pin 16",
238 "J2 Header Pin 23", "J2 Header Pin 21",
239 "J2 Header Pin 19", "J2 Header Pin 33",
240 "J2 Header Pin 8", "J2 Header Pin 10",
241 "J2 Header Pin 15", "J2 Header Pin 13",
242 "J2 Header Pin 24", "J2 Header Pin 26",
245 "J2 Header Pin 7", "", "J2 Header Pin 12",
[all …]
Dorion5x-netgear-wnr854t.dts245 /* Pin 1: Tx, Pin 7: Rx, Pin 8: Gnd */
Ds3c2416-pinctrl.dtsi12 * Pin banks
80 * Pin groups
/Linux-v6.1/arch/arm64/boot/dts/hisilicon/
Dhi6220-hikey.dts356 * Pin assignments taken from LeMaker and CircuitCo Schematics
384 "GPIO-A", /* LSEC Pin 23: GPIO2_0 */
385 "GPIO-B", /* LSEC Pin 24: GPIO2_1 */
386 "GPIO-C", /* LSEC Pin 25: GPIO2_2 */
387 "GPIO-D", /* LSEC Pin 26: GPIO2_3 */
388 "GPIO-E", /* LSEC Pin 27: GPIO2_4 */
390 "GPIO-H"; /* LSEC Pin 30: GPIO2_7 */
405 "[UART1_RxD]", /* LSEC Pin 11: UART3_RX */
406 "[UART1_TxD]", /* LSEC Pin 13: UART3_TX */
408 "[PCM_CLK]", /* LSEC Pin 18: MODEM_PCM_XCLK */
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/pinctrl/
Dmarvell,dove-pinctrl.txt64 pmu-nc Pin not driven by any PM function
65 pmu-low Pin driven low (0)
66 pmu-high Pin driven high (1)
67 pmic(sdi) Pin is used for PMIC SDI
68 cpu-pwr-down Pin is used for CPU_PWRDWN
69 standby-pwr-down Pin is used for STBY_PWRDWN
70 core-pwr-good Pin is used for CORE_PWR_GOOD (Pins 0-7 only)
71 cpu-pwr-good Pin is used for CPU_PWR_GOOD (Pins 8-15 only)
72 bat-fault Pin is used for BATTERY_FAULT
73 ext0-wakeup Pin is used for EXT0_WU
[all …]
Dcnxt,cx92755-pinctrl.txt1 Conexant Digicolor CX92755 General Purpose Pin Mapping
7 === Pin Controller Node ===
12 - reg: Base address of the General Purpose Pin Mapping register block and the
34 === Pin Configuration Node ===
44 === Pin Group Node ===
56 Required Pin Group Node Properties:
Dberlin,pinctrl.txt1 * Pin-controller driver for the Marvell Berlin SoCs
3 Pin control registers are part of both chip controller and system
4 controller register sets. Pin controller nodes should be a sub-node of
Dfsl,imx7ulp-pinctrl.txt41 /* Pin Controller Node */
46 /* Pin Configuration Node */
Dti,da850-pupd.txt1 * Pin configuration for TI DA850/OMAP-L138/AM18x
15 Pin Group Node Properties:
Dbrcm,nsp-gpio.txt34 3 Pin-control base pin offset.
40 in the node apply to. Pin names are "gpio-<pin>"
Dsprd,sc9860-pinctrl.txt1 * Spreadtrum SC9860 Pin Controller
31 Pin sleep mode definition:
Dbrcm,iproc-gpio.txt51 3 Pin-control base pin offset.
58 in the node apply to. Pin names are "gpio-<pin>"
/Linux-v6.1/Documentation/devicetree/bindings/sound/
Drt274.txt18 * DMIC1 Pin
19 * DMIC2 Pin
23 * HPO Pin
Dcs4265.txt20 codec_ad0_high: cs4265@4f { /* AD0 Pin is high */
26 codec_ad0_low: cs4265@4e { /* AD0 Pin is low */
/Linux-v6.1/Documentation/input/devices/
Damijoy.rst13 Pin Meaning Pin Meaning
27 Pin Meaning
44 Pin Meaning
61 Pin Meaning
78 Pin Meaning
152 | Directions | Pin# | Counter bits |
/Linux-v6.1/rust/alloc/
Dboxed.rs153 use core::pin::Pin;
265 pub fn pin(x: T) -> Pin<Box<T>> { in pin()
553 pub const fn pin_in(x: T, alloc: A) -> Pin<Self> in pin_in()
1170 pub const fn into_pin(boxed: Self) -> Pin<Self> in into_pin()
1177 unsafe { Pin::new_unchecked(boxed) } in into_pin()
1407 impl<T: ?Sized, A: Allocator> const From<Box<T, A>> for Pin<Box<T, A>> implementation
1987 fn resume(mut self: Pin<&mut Self>, arg: R) -> GeneratorState<Self::Yield, Self::Return> { in resume()
1988 G::resume(Pin::new(&mut *self), arg) in resume()
1993 impl<G: ?Sized + Generator<R>, R, A: Allocator> Generator<R> for Pin<Box<G, A>> implementation
2000 fn resume(mut self: Pin<&mut Self>, arg: R) -> GeneratorState<Self::Yield, Self::Return> { in resume()
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/
Dpincfg.txt1 * Pin configuration nodes
22 - assignment : function number of the pin according to the Pin Assignment
/Linux-v6.1/Documentation/hwmon/
Dw83795.rst27 Pin mapping
38 Pin Name Register Sysfs attribute
97 Pin Name Register Sysfs attribute
/Linux-v6.1/Documentation/w1/slaves/
Dw1_ds2413.rst29 Bit 0: PIOA Pin State
31 Bit 2: PIOB Pin State
/Linux-v6.1/Documentation/devicetree/bindings/display/tilcdc/
Dpanel.txt6 - ac-bias: AC Bias Pin Frequency
7 - ac-bias-intrpt: AC Bias Pin Transitions per Interrupt
/Linux-v6.1/rust/kernel/
Dprelude.rs19 pub use core::pin::Pin;
/Linux-v6.1/Documentation/admin-guide/auxdisplay/
Dcfag12864b.rst53 Name Pin# Pin# Name
/Linux-v6.1/Documentation/sound/hd-audio/
Dmodels.rst100 Pin configs for Lenovo Thinkpad Dock support
112 Pin fixups for Sony VAIO laptops
343 Pin fixups for Abit AW9D-MAX
345 Pin fixups for Lenovo Y530
349 Pin fixup for ASUS W90V
355 Pin fixup for VAIO TT
719 Pin configs for ASUS mobo with 5.1/SPDIF out
748 Pin fixup for HP Envy bass speaker (NID 0x0f)
750 Pin fixup for HP Envy TS bass speaker (NID 0x10)
/Linux-v6.1/arch/mips/boot/dts/cavium-octeon/
Docteon_3xxx.dts120 interrupts = <12 8>; /* Pin 12, active low */
130 interrupts = <12 8>; /* Pin 12, active low */
140 interrupts = <12 8>; /* Pin 12, active low */
150 interrupts = <12 8>; /* Pin 12, active low */

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