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Searched refs:PP_CONTROL (Results 1 – 11 of 11) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/gma500/
Dpsb_lid.c28 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) | POWER_TARGET_ON); in psb_lid_timer_func()
44 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) & ~POWER_TARGET_ON); in psb_lid_timer_func()
Dpsb_intel_lvds.c218 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) | in psb_intel_lvds_set_power()
229 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) & in psb_intel_lvds_set_power()
262 lvds_priv->savePP_CONTROL = REG_READ(PP_CONTROL); in psb_intel_lvds_save()
313 REG_WRITE(PP_CONTROL, lvds_priv->savePP_CONTROL); in psb_intel_lvds_restore()
317 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) | in psb_intel_lvds_restore()
323 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) & in psb_intel_lvds_restore()
Dcdv_intel_dp.c387 pp = REG_READ(PP_CONTROL); in cdv_intel_edp_panel_vdd_on()
390 REG_WRITE(PP_CONTROL, pp); in cdv_intel_edp_panel_vdd_on()
391 REG_READ(PP_CONTROL); in cdv_intel_edp_panel_vdd_on()
401 pp = REG_READ(PP_CONTROL); in cdv_intel_edp_panel_vdd_off()
404 REG_WRITE(PP_CONTROL, pp); in cdv_intel_edp_panel_vdd_off()
405 REG_READ(PP_CONTROL); in cdv_intel_edp_panel_vdd_off()
420 pp = REG_READ(PP_CONTROL); in cdv_intel_edp_panel_on()
424 REG_WRITE(PP_CONTROL, pp); in cdv_intel_edp_panel_on()
425 REG_READ(PP_CONTROL); in cdv_intel_edp_panel_on()
445 pp = REG_READ(PP_CONTROL); in cdv_intel_edp_panel_off()
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Doaktrail_lvds.c47 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) | in oaktrail_lvds_set_power()
58 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) & in oaktrail_lvds_set_power()
Dcdv_intel_lvds.c115 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) | in cdv_intel_lvds_set_power()
126 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) & in cdv_intel_lvds_set_power()
Doaktrail_device.c175 regs->psb.savePP_CONTROL = PSB_RVDC32(PP_CONTROL); in oaktrail_save_display_registers()
204 PSB_WVDC32(0, PP_CONTROL); in oaktrail_save_display_registers()
312 PSB_WVDC32(regs->psb.savePP_CONTROL, PP_CONTROL); in oaktrail_restore_display_registers()
Dcdv_device.c252 regs->cdv.savePP_CONTROL = REG_READ(PP_CONTROL); in cdv_save_display_registers()
335 REG_WRITE(PP_CONTROL, regs->cdv.savePP_CONTROL); in cdv_restore_display_registers()
Dpsb_intel_reg.h168 #define PP_CONTROL 0x61204 macro
/Linux-v6.1/drivers/gpu/drm/i915/display/
Dintel_lvds.c162 pps->powerdown_on_reset = intel_de_read(dev_priv, PP_CONTROL(0)) & PANEL_POWER_RESET; in intel_lvds_pps_get_hw_state()
210 val = intel_de_read(dev_priv, PP_CONTROL(0)); in intel_lvds_pps_init_hw()
215 intel_de_write(dev_priv, PP_CONTROL(0), val); in intel_lvds_pps_init_hw()
321 intel_de_write(dev_priv, PP_CONTROL(0), in intel_enable_lvds()
322 intel_de_read(dev_priv, PP_CONTROL(0)) | PANEL_POWER_ON); in intel_enable_lvds()
340 intel_de_write(dev_priv, PP_CONTROL(0), in intel_disable_lvds()
341 intel_de_read(dev_priv, PP_CONTROL(0)) & ~PANEL_POWER_ON); in intel_disable_lvds()
Dintel_pps.c247 return intel_de_read(dev_priv, PP_CONTROL(pipe)) & EDP_FORCE_VDD; in vlv_pipe_has_vdd_on()
374 regs->pp_ctrl = PP_CONTROL(pps_idx); in intel_pps_get_registers()
1481 u32 val = intel_de_read(dev_priv, PP_CONTROL(pps_idx)); in intel_pps_unlock_regs_wa()
1484 intel_de_write(dev_priv, PP_CONTROL(pps_idx), val); in intel_pps_unlock_regs_wa()
1511 pp_reg = PP_CONTROL(0); in assert_pps_unlocked()
1533 pp_reg = PP_CONTROL(pipe); in assert_pps_unlocked()
1538 pp_reg = PP_CONTROL(0); in assert_pps_unlocked()
/Linux-v6.1/drivers/gpu/drm/i915/
Di915_reg.h2813 #define PP_CONTROL(pps_idx) _MMIO_PPS(pps_idx, _PP_CONTROL) macro