Searched refs:PIPEACONF_ENABLE (Results 1 – 7 of 7) sorted by relevance
364 pipeconf |= PIPEACONF_ENABLE; in oaktrail_crtc_hdmi_mode_set()404 if ((temp & PIPEACONF_ENABLE) != 0) { in oaktrail_crtc_hdmi_dpms()405 REG_WRITE(PIPEBCONF, temp & ~PIPEACONF_ENABLE); in oaktrail_crtc_hdmi_dpms()411 if ((temp & PIPEACONF_ENABLE) != 0) { in oaktrail_crtc_hdmi_dpms()412 REG_WRITE(PCH_PIPEBCONF, temp & ~PIPEACONF_ENABLE); in oaktrail_crtc_hdmi_dpms()446 if ((temp & PIPEACONF_ENABLE) == 0) { in oaktrail_crtc_hdmi_dpms()447 REG_WRITE(PIPEBCONF, temp | PIPEACONF_ENABLE); in oaktrail_crtc_hdmi_dpms()453 if ((temp & PIPEACONF_ENABLE) == 0) { in oaktrail_crtc_hdmi_dpms()454 REG_WRITE(PCH_PIPEBCONF, temp | PIPEACONF_ENABLE); in oaktrail_crtc_hdmi_dpms()
264 if ((temp & PIPEACONF_ENABLE) == 0) { in oaktrail_crtc_dpms()266 temp | PIPEACONF_ENABLE, i); in oaktrail_crtc_dpms()308 if ((temp & PIPEACONF_ENABLE) != 0) { in oaktrail_crtc_dpms()310 temp & ~PIPEACONF_ENABLE, i); in oaktrail_crtc_dpms()
250 if ((temp & PIPEACONF_ENABLE) == 0) in gma_crtc_dpms()251 REG_WRITE(map->conf, temp | PIPEACONF_ENABLE); in gma_crtc_dpms()298 if ((temp & PIPEACONF_ENABLE) != 0) { in gma_crtc_dpms()299 REG_WRITE(map->conf, temp & ~PIPEACONF_ENABLE); in gma_crtc_dpms()
396 if (!(reg_val & PIPEACONF_ENABLE)) in gma_crtc_enable_vblank()472 if (!(reg_val & PIPEACONF_ENABLE)) { in gma_crtc_get_vblank_counter()
205 pipeconf |= PIPEACONF_ENABLE; in psb_intel_crtc_mode_set()
480 #define PIPEACONF_ENABLE (1 << 31) macro
719 pipeconf |= PIPEACONF_ENABLE; in cdv_intel_crtc_mode_set()