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Searched refs:PHYPLLB_PIXCLK_RESYNC_CNTL__PHYPLLB_PIXCLK_ENABLE__SHIFT (Results 1 – 16 of 16) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_sh_mask.h38 #define PHYPLLB_PIXCLK_RESYNC_CNTL__PHYPLLB_PIXCLK_ENABLE__SHIFT … macro
Ddcn_3_0_3_sh_mask.h380 #define PHYPLLB_PIXCLK_RESYNC_CNTL__PHYPLLB_PIXCLK_ENABLE__SHIFT … macro
Ddcn_2_1_0_sh_mask.h290 #define PHYPLLB_PIXCLK_RESYNC_CNTL__PHYPLLB_PIXCLK_ENABLE__SHIFT … macro
Ddcn_3_2_1_sh_mask.h63 #define PHYPLLB_PIXCLK_RESYNC_CNTL__PHYPLLB_PIXCLK_ENABLE__SHIFT … macro
Ddcn_3_0_1_sh_mask.h687 #define PHYPLLB_PIXCLK_RESYNC_CNTL__PHYPLLB_PIXCLK_ENABLE__SHIFT … macro
Ddcn_1_0_sh_mask.h1787 #define PHYPLLB_PIXCLK_RESYNC_CNTL__PHYPLLB_PIXCLK_ENABLE__SHIFT … macro
Ddcn_3_1_5_sh_mask.h65 #define PHYPLLB_PIXCLK_RESYNC_CNTL__PHYPLLB_PIXCLK_ENABLE__SHIFT … macro
Ddcn_3_1_2_sh_mask.h558 #define PHYPLLB_PIXCLK_RESYNC_CNTL__PHYPLLB_PIXCLK_ENABLE__SHIFT … macro
Ddcn_3_0_2_sh_mask.h393 #define PHYPLLB_PIXCLK_RESYNC_CNTL__PHYPLLB_PIXCLK_ENABLE__SHIFT … macro
Ddcn_3_1_6_sh_mask.h1080 #define PHYPLLB_PIXCLK_RESYNC_CNTL__PHYPLLB_PIXCLK_ENABLE__SHIFT … macro
Ddcn_3_1_4_sh_mask.h7947 #define PHYPLLB_PIXCLK_RESYNC_CNTL__PHYPLLB_PIXCLK_ENABLE__SHIFT … macro
Ddcn_3_0_0_sh_mask.h373 #define PHYPLLB_PIXCLK_RESYNC_CNTL__PHYPLLB_PIXCLK_ENABLE__SHIFT … macro
Ddcn_2_0_0_sh_mask.h393 #define PHYPLLB_PIXCLK_RESYNC_CNTL__PHYPLLB_PIXCLK_ENABLE__SHIFT … macro
Ddcn_3_2_0_sh_mask.h64 #define PHYPLLB_PIXCLK_RESYNC_CNTL__PHYPLLB_PIXCLK_ENABLE__SHIFT … macro
/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_11_2_sh_mask.h1676 #define PHYPLLB_PIXCLK_RESYNC_CNTL__PHYPLLB_PIXCLK_ENABLE__SHIFT 0x8 macro
Ddce_12_0_sh_mask.h2340 #define PHYPLLB_PIXCLK_RESYNC_CNTL__PHYPLLB_PIXCLK_ENABLE__SHIFT … macro