Searched refs:PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT (Results 1 – 1 of 1) sorted by relevance
62 #define PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT 0x178 macro577 u32 val = readl(pcie->parf + PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT); in qcom_pcie_post_init_1_0_0()580 writel(val, pcie->parf + PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT); in qcom_pcie_post_init_1_0_0()1280 val = readl(pcie->parf + PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT); in qcom_pcie_init_2_7_0()1282 writel(val, pcie->parf + PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT); in qcom_pcie_init_2_7_0()
