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Searched refs:PA_CL_UCP_0_X__DATA_REGISTER__SHIFT (Results 1 – 12 of 12) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h5673 #define PA_CL_UCP_0_X__DATA_REGISTER__SHIFT 0x00000000 macro
Dgfx_7_2_sh_mask.h5612 #define PA_CL_UCP_0_X__DATA_REGISTER__SHIFT 0x0 macro
Dgfx_8_0_sh_mask.h6400 #define PA_CL_UCP_0_X__DATA_REGISTER__SHIFT 0x0 macro
Dgfx_8_1_sh_mask.h6934 #define PA_CL_UCP_0_X__DATA_REGISTER__SHIFT 0x0 macro
/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h15459 #define PA_CL_UCP_0_X__DATA_REGISTER__SHIFT … macro
Dgc_9_1_sh_mask.h16768 #define PA_CL_UCP_0_X__DATA_REGISTER__SHIFT … macro
Dgc_9_2_1_sh_mask.h16640 #define PA_CL_UCP_0_X__DATA_REGISTER__SHIFT … macro
Dgc_9_4_2_sh_mask.h8889 #define PA_CL_UCP_0_X__DATA_REGISTER__SHIFT … macro
Dgc_11_0_0_sh_mask.h20553 #define PA_CL_UCP_0_X__DATA_REGISTER__SHIFT … macro
Dgc_10_1_0_sh_mask.h22838 #define PA_CL_UCP_0_X__DATA_REGISTER__SHIFT … macro
Dgc_11_0_3_sh_mask.h22887 #define PA_CL_UCP_0_X__DATA_REGISTER__SHIFT … macro
Dgc_10_3_0_sh_mask.h21015 #define PA_CL_UCP_0_X__DATA_REGISTER__SHIFT … macro