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Searched refs:PA_CL_CLIP_CNTL__UCP_ENA_5__SHIFT (Results 1 – 12 of 12) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h5593 #define PA_CL_CLIP_CNTL__UCP_ENA_5__SHIFT 0x00000005 macro
Dgfx_7_2_sh_mask.h5576 #define PA_CL_CLIP_CNTL__UCP_ENA_5__SHIFT 0x5 macro
Dgfx_8_0_sh_mask.h6364 #define PA_CL_CLIP_CNTL__UCP_ENA_5__SHIFT 0x5 macro
Dgfx_8_1_sh_mask.h6898 #define PA_CL_CLIP_CNTL__UCP_ENA_5__SHIFT 0x5 macro
/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h16894 #define PA_CL_CLIP_CNTL__UCP_ENA_5__SHIFT … macro
Dgc_9_1_sh_mask.h18203 #define PA_CL_CLIP_CNTL__UCP_ENA_5__SHIFT … macro
Dgc_9_2_1_sh_mask.h18078 #define PA_CL_CLIP_CNTL__UCP_ENA_5__SHIFT … macro
Dgc_9_4_2_sh_mask.h10325 #define PA_CL_CLIP_CNTL__UCP_ENA_5__SHIFT … macro
Dgc_11_0_0_sh_mask.h22093 #define PA_CL_CLIP_CNTL__UCP_ENA_5__SHIFT … macro
Dgc_10_1_0_sh_mask.h24266 #define PA_CL_CLIP_CNTL__UCP_ENA_5__SHIFT … macro
Dgc_11_0_3_sh_mask.h24427 #define PA_CL_CLIP_CNTL__UCP_ENA_5__SHIFT … macro
Dgc_10_3_0_sh_mask.h22524 #define PA_CL_CLIP_CNTL__UCP_ENA_5__SHIFT … macro