Home
last modified time | relevance | path

Searched refs:PA_CL_CLIP_CNTL__UCP_ENA_2_MASK (Results 1 – 12 of 12) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h5586 #define PA_CL_CLIP_CNTL__UCP_ENA_2_MASK 0x00000004L macro
Dgfx_7_2_sh_mask.h5569 #define PA_CL_CLIP_CNTL__UCP_ENA_2_MASK 0x4 macro
Dgfx_8_0_sh_mask.h6357 #define PA_CL_CLIP_CNTL__UCP_ENA_2_MASK 0x4 macro
Dgfx_8_1_sh_mask.h6891 #define PA_CL_CLIP_CNTL__UCP_ENA_2_MASK 0x4 macro
/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h16910 #define PA_CL_CLIP_CNTL__UCP_ENA_2_MASK macro
Dgc_9_1_sh_mask.h18219 #define PA_CL_CLIP_CNTL__UCP_ENA_2_MASK macro
Dgc_9_2_1_sh_mask.h18095 #define PA_CL_CLIP_CNTL__UCP_ENA_2_MASK macro
Dgc_9_4_2_sh_mask.h10342 #define PA_CL_CLIP_CNTL__UCP_ENA_2_MASK macro
Dgc_11_0_0_sh_mask.h22110 #define PA_CL_CLIP_CNTL__UCP_ENA_2_MASK macro
Dgc_10_1_0_sh_mask.h24283 #define PA_CL_CLIP_CNTL__UCP_ENA_2_MASK macro
Dgc_11_0_3_sh_mask.h24444 #define PA_CL_CLIP_CNTL__UCP_ENA_2_MASK macro
Dgc_10_3_0_sh_mask.h22541 #define PA_CL_CLIP_CNTL__UCP_ENA_2_MASK macro