Searched refs:PANEL_POWER_CYCLE_DELAY_MASK (Results 1 – 5 of 5) sorted by relevance
175 val = REG_FIELD_GET(PANEL_POWER_CYCLE_DELAY_MASK, val); in intel_lvds_pps_get_hw_state()224 …REP(PP_REFERENCE_DIVIDER_MASK, pps->divider) | REG_FIELD_PREP(PANEL_POWER_CYCLE_DELAY_MASK, DIV_RO… in intel_lvds_pps_init_hw()
1135 seq->t11_t12 = REG_FIELD_GET(PANEL_POWER_CYCLE_DELAY_MASK, pp_div) * 1000; in intel_pps_readout_hw_state()1383 …REFERENCE_DIVIDER_MASK, (100 * div) / 2 - 1) | REG_FIELD_PREP(PANEL_POWER_CYCLE_DELAY_MASK, DIV_RO… in pps_init_registers()
202 #define PANEL_POWER_CYCLE_DELAY_MASK (0x1f) macro
2045 cur.t11_t12 = ((pp_div & PANEL_POWER_CYCLE_DELAY_MASK) >> in cdv_intel_dp_init()
2841 #define PANEL_POWER_CYCLE_DELAY_MASK REG_GENMASK(4, 0) macro
