Searched refs:NotEnoughUrgentLatencyHidingPre (Results 1 – 5 of 5) sorted by relevance
384 unsigned int *NotEnoughUrgentLatencyHidingPre);2276 &locals->NotEnoughUrgentLatencyHidingPre); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()2309 locals->NotEnoughUrgentLatencyHidingPre == 0 && !VRatioPrefetchMoreThan4 in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()4841 &locals->NotEnoughUrgentLatencyHidingPre); in dml21_ModeSupportAndSystemConfigurationFull()4874 || locals->NotEnoughUrgentLatencyHidingPre == 1) { in dml21_ModeSupportAndSystemConfigurationFull()5633 unsigned int *NotEnoughUrgentLatencyHidingPre) in CalculateUrgentBurstFactor() argument5648 *NotEnoughUrgentLatencyHidingPre = 0; in CalculateUrgentBurstFactor()5664 *NotEnoughUrgentLatencyHidingPre = 1; in CalculateUrgentBurstFactor()5695 *NotEnoughUrgentLatencyHidingPre = 1; in CalculateUrgentBurstFactor()5720 *NotEnoughUrgentLatencyHidingPre = 1; in CalculateUrgentBurstFactor()
887 unsigned int NotEnoughUrgentLatencyHidingPre; member
2534 v->NotEnoughUrgentLatencyHidingPre = false; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()2621 v->NotEnoughUrgentLatencyHidingPre = true; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()2627 && v->NotEnoughUrgentLatencyHidingPre == 0 && !VRatioPrefetchMoreThan4 in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()4888 v->NotEnoughUrgentLatencyHidingPre = false; in dml30_ModeSupportAndSystemConfigurationFull()4891 v->NotEnoughUrgentLatencyHidingPre = true; in dml30_ModeSupportAndSystemConfigurationFull()4897 || v->NotEnoughUrgentLatencyHidingPre == 1) { in dml30_ModeSupportAndSystemConfigurationFull()
5124 v->NotEnoughUrgentLatencyHidingPre = false;5127 v->NotEnoughUrgentLatencyHidingPre = true;5133 || v->NotEnoughUrgentLatencyHidingPre == 1) {
5221 v->NotEnoughUrgentLatencyHidingPre = false;5224 v->NotEnoughUrgentLatencyHidingPre = true;5230 || v->NotEnoughUrgentLatencyHidingPre == 1) {
