1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (C) 2021, Intel Corporation. */
3
4 #ifndef _ICE_PTP_H_
5 #define _ICE_PTP_H_
6
7 #include <linux/ptp_clock_kernel.h>
8 #include <linux/kthread.h>
9
10 #include "ice_ptp_hw.h"
11
12 enum ice_ptp_pin_e810 {
13 GPIO_20 = 0,
14 GPIO_21,
15 GPIO_22,
16 GPIO_23,
17 NUM_PTP_PIN_E810
18 };
19
20 enum ice_ptp_pin_e810t {
21 GNSS = 0,
22 SMA1,
23 UFL1,
24 SMA2,
25 UFL2,
26 NUM_PTP_PINS_E810T
27 };
28
29 struct ice_perout_channel {
30 bool ena;
31 u32 gpio_pin;
32 u64 period;
33 u64 start_time;
34 };
35
36 /* The ice hardware captures Tx hardware timestamps in the PHY. The timestamp
37 * is stored in a buffer of registers. Depending on the specific hardware,
38 * this buffer might be shared across multiple PHY ports.
39 *
40 * On transmit of a packet to be timestamped, software is responsible for
41 * selecting an open index. Hardware makes no attempt to lock or prevent
42 * re-use of an index for multiple packets.
43 *
44 * To handle this, timestamp indexes must be tracked by software to ensure
45 * that an index is not re-used for multiple transmitted packets. The
46 * structures and functions declared in this file track the available Tx
47 * register indexes, as well as provide storage for the SKB pointers.
48 *
49 * To allow multiple ports to access the shared register block independently,
50 * the blocks are split up so that indexes are assigned to each port based on
51 * hardware logical port number.
52 *
53 * The timestamp blocks are handled differently for E810- and E822-based
54 * devices. In E810 devices, each port has its own block of timestamps, while in
55 * E822 there is a need to logically break the block of registers into smaller
56 * chunks based on the port number to avoid collisions.
57 *
58 * Example for port 5 in E810:
59 * +--------+--------+--------+--------+--------+--------+--------+--------+
60 * |register|register|register|register|register|register|register|register|
61 * | block | block | block | block | block | block | block | block |
62 * | for | for | for | for | for | for | for | for |
63 * | port 0 | port 1 | port 2 | port 3 | port 4 | port 5 | port 6 | port 7 |
64 * +--------+--------+--------+--------+--------+--------+--------+--------+
65 * ^^
66 * ||
67 * |--- quad offset is always 0
68 * ---- quad number
69 *
70 * Example for port 5 in E822:
71 * +-----------------------------+-----------------------------+
72 * | register block for quad 0 | register block for quad 1 |
73 * |+------+------+------+------+|+------+------+------+------+|
74 * ||port 0|port 1|port 2|port 3|||port 0|port 1|port 2|port 3||
75 * |+------+------+------+------+|+------+------+------+------+|
76 * +-----------------------------+-------^---------------------+
77 * ^ |
78 * | --- quad offset*
79 * ---- quad number
80 *
81 * * PHY port 5 is port 1 in quad 1
82 *
83 */
84
85 /**
86 * struct ice_tx_tstamp - Tracking for a single Tx timestamp
87 * @skb: pointer to the SKB for this timestamp request
88 * @start: jiffies when the timestamp was first requested
89 * @cached_tstamp: last read timestamp
90 *
91 * This structure tracks a single timestamp request. The SKB pointer is
92 * provided when initiating a request. The start time is used to ensure that
93 * we discard old requests that were not fulfilled within a 2 second time
94 * window.
95 * Timestamp values in the PHY are read only and do not get cleared except at
96 * hardware reset or when a new timestamp value is captured. The cached_tstamp
97 * field is used to detect the case where a new timestamp has not yet been
98 * captured, ensuring that we avoid sending stale timestamp data to the stack.
99 */
100 struct ice_tx_tstamp {
101 struct sk_buff *skb;
102 unsigned long start;
103 u64 cached_tstamp;
104 };
105
106 /**
107 * struct ice_ptp_tx - Tracking structure for all Tx timestamp requests on a port
108 * @lock: lock to prevent concurrent write to in_use bitmap
109 * @tstamps: array of len to store outstanding requests
110 * @in_use: bitmap of len to indicate which slots are in use
111 * @quad: which quad the timestamps are captured in
112 * @quad_offset: offset into timestamp block of the quad to get the real index
113 * @len: length of the tstamps and in_use fields.
114 * @init: if true, the tracker is initialized;
115 * @calibrating: if true, the PHY is calibrating the Tx offset. During this
116 * window, timestamps are temporarily disabled.
117 */
118 struct ice_ptp_tx {
119 spinlock_t lock; /* lock protecting in_use bitmap */
120 struct ice_tx_tstamp *tstamps;
121 unsigned long *in_use;
122 u8 quad;
123 u8 quad_offset;
124 u8 len;
125 u8 init;
126 u8 calibrating;
127 };
128
129 /* Quad and port information for initializing timestamp blocks */
130 #define INDEX_PER_QUAD 64
131 #define INDEX_PER_PORT (INDEX_PER_QUAD / ICE_PORTS_PER_QUAD)
132
133 /**
134 * struct ice_ptp_port - data used to initialize an external port for PTP
135 *
136 * This structure contains data indicating whether a single external port is
137 * ready for PTP functionality. It is used to track the port initialization
138 * and determine when the port's PHY offset is valid.
139 *
140 * @tx: Tx timestamp tracking for this port
141 * @ov_work: delayed work task for tracking when PHY offset is valid
142 * @ps_lock: mutex used to protect the overall PTP PHY start procedure
143 * @link_up: indicates whether the link is up
144 * @tx_fifo_busy_cnt: number of times the Tx FIFO was busy
145 * @port_num: the port number this structure represents
146 */
147 struct ice_ptp_port {
148 struct ice_ptp_tx tx;
149 struct kthread_delayed_work ov_work;
150 struct mutex ps_lock; /* protects overall PTP PHY start procedure */
151 bool link_up;
152 u8 tx_fifo_busy_cnt;
153 u8 port_num;
154 };
155
156 #define GLTSYN_TGT_H_IDX_MAX 4
157
158 /**
159 * struct ice_ptp - data used for integrating with CONFIG_PTP_1588_CLOCK
160 * @port: data for the PHY port initialization procedure
161 * @work: delayed work function for periodic tasks
162 * @extts_work: work function for handling external Tx timestamps
163 * @cached_phc_time: a cached copy of the PHC time for timestamp extension
164 * @cached_phc_jiffies: jiffies when cached_phc_time was last updated
165 * @ext_ts_chan: the external timestamp channel in use
166 * @ext_ts_irq: the external timestamp IRQ in use
167 * @kworker: kwork thread for handling periodic work
168 * @perout_channels: periodic output data
169 * @info: structure defining PTP hardware capabilities
170 * @clock: pointer to registered PTP clock device
171 * @tstamp_config: hardware timestamping configuration
172 * @reset_time: kernel time after clock stop on reset
173 * @tx_hwtstamp_skipped: number of Tx time stamp requests skipped
174 * @tx_hwtstamp_timeouts: number of Tx skbs discarded with no time stamp
175 * @tx_hwtstamp_flushed: number of Tx skbs flushed due to interface closed
176 * @tx_hwtstamp_discarded: number of Tx skbs discarded due to cached PHC time
177 * being too old to correctly extend timestamp
178 * @late_cached_phc_updates: number of times cached PHC update is late
179 */
180 struct ice_ptp {
181 struct ice_ptp_port port;
182 struct kthread_delayed_work work;
183 struct kthread_work extts_work;
184 u64 cached_phc_time;
185 unsigned long cached_phc_jiffies;
186 u8 ext_ts_chan;
187 u8 ext_ts_irq;
188 struct kthread_worker *kworker;
189 struct ice_perout_channel perout_channels[GLTSYN_TGT_H_IDX_MAX];
190 struct ptp_clock_info info;
191 struct ptp_clock *clock;
192 struct hwtstamp_config tstamp_config;
193 u64 reset_time;
194 u32 tx_hwtstamp_skipped;
195 u32 tx_hwtstamp_timeouts;
196 u32 tx_hwtstamp_flushed;
197 u32 tx_hwtstamp_discarded;
198 u32 late_cached_phc_updates;
199 };
200
201 #define __ptp_port_to_ptp(p) \
202 container_of((p), struct ice_ptp, port)
203 #define ptp_port_to_pf(p) \
204 container_of(__ptp_port_to_ptp((p)), struct ice_pf, ptp)
205
206 #define __ptp_info_to_ptp(i) \
207 container_of((i), struct ice_ptp, info)
208 #define ptp_info_to_pf(i) \
209 container_of(__ptp_info_to_ptp((i)), struct ice_pf, ptp)
210
211 #define PFTSYN_SEM_BYTES 4
212 #define PTP_SHARED_CLK_IDX_VALID BIT(31)
213 #define TS_CMD_MASK 0xF
214 #define SYNC_EXEC_CMD 0x3
215 #define ICE_PTP_TS_VALID BIT(0)
216
217 #define FIFO_EMPTY BIT(2)
218 #define FIFO_OK 0xFF
219 #define ICE_PTP_FIFO_NUM_CHECKS 5
220 /* Per-channel register definitions */
221 #define GLTSYN_AUX_OUT(_chan, _idx) (GLTSYN_AUX_OUT_0(_idx) + ((_chan) * 8))
222 #define GLTSYN_AUX_IN(_chan, _idx) (GLTSYN_AUX_IN_0(_idx) + ((_chan) * 8))
223 #define GLTSYN_CLKO(_chan, _idx) (GLTSYN_CLKO_0(_idx) + ((_chan) * 8))
224 #define GLTSYN_TGT_L(_chan, _idx) (GLTSYN_TGT_L_0(_idx) + ((_chan) * 16))
225 #define GLTSYN_TGT_H(_chan, _idx) (GLTSYN_TGT_H_0(_idx) + ((_chan) * 16))
226 #define GLTSYN_EVNT_L(_chan, _idx) (GLTSYN_EVNT_L_0(_idx) + ((_chan) * 16))
227 #define GLTSYN_EVNT_H(_chan, _idx) (GLTSYN_EVNT_H_0(_idx) + ((_chan) * 16))
228 #define GLTSYN_EVNT_H_IDX_MAX 3
229
230 /* Pin definitions for PTP PPS out */
231 #define PPS_CLK_GEN_CHAN 3
232 #define PPS_CLK_SRC_CHAN 2
233 #define PPS_PIN_INDEX 5
234 #define TIME_SYNC_PIN_INDEX 4
235 #define N_EXT_TS_E810 3
236 #define N_PER_OUT_E810 4
237 #define N_PER_OUT_E810T 3
238 #define N_PER_OUT_NO_SMA_E810T 2
239 #define N_EXT_TS_NO_SMA_E810T 2
240 #define ETH_GLTSYN_ENA(_i) (0x03000348 + ((_i) * 4))
241
242 #if IS_ENABLED(CONFIG_PTP_1588_CLOCK)
243 struct ice_pf;
244 int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr);
245 int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr);
246 void ice_ptp_cfg_timestamp(struct ice_pf *pf, bool ena);
247 int ice_get_ptp_clock_index(struct ice_pf *pf);
248
249 s8 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb);
250 bool ice_ptp_process_ts(struct ice_pf *pf);
251
252 void
253 ice_ptp_rx_hwtstamp(struct ice_rx_ring *rx_ring,
254 union ice_32b_rx_flex_desc *rx_desc, struct sk_buff *skb);
255 void ice_ptp_reset(struct ice_pf *pf);
256 void ice_ptp_prepare_for_reset(struct ice_pf *pf);
257 void ice_ptp_init(struct ice_pf *pf);
258 void ice_ptp_release(struct ice_pf *pf);
259 int ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup);
260 #else /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */
ice_ptp_set_ts_config(struct ice_pf * pf,struct ifreq * ifr)261 static inline int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr)
262 {
263 return -EOPNOTSUPP;
264 }
265
ice_ptp_get_ts_config(struct ice_pf * pf,struct ifreq * ifr)266 static inline int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr)
267 {
268 return -EOPNOTSUPP;
269 }
270
ice_ptp_cfg_timestamp(struct ice_pf * pf,bool ena)271 static inline void ice_ptp_cfg_timestamp(struct ice_pf *pf, bool ena) { }
ice_get_ptp_clock_index(struct ice_pf * pf)272 static inline int ice_get_ptp_clock_index(struct ice_pf *pf)
273 {
274 return -1;
275 }
276
277 static inline s8
ice_ptp_request_ts(struct ice_ptp_tx * tx,struct sk_buff * skb)278 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb)
279 {
280 return -1;
281 }
282
ice_ptp_process_ts(struct ice_pf * pf)283 static inline bool ice_ptp_process_ts(struct ice_pf *pf)
284 {
285 return true;
286 }
287 static inline void
ice_ptp_rx_hwtstamp(struct ice_rx_ring * rx_ring,union ice_32b_rx_flex_desc * rx_desc,struct sk_buff * skb)288 ice_ptp_rx_hwtstamp(struct ice_rx_ring *rx_ring,
289 union ice_32b_rx_flex_desc *rx_desc, struct sk_buff *skb) { }
ice_ptp_reset(struct ice_pf * pf)290 static inline void ice_ptp_reset(struct ice_pf *pf) { }
ice_ptp_prepare_for_reset(struct ice_pf * pf)291 static inline void ice_ptp_prepare_for_reset(struct ice_pf *pf) { }
ice_ptp_init(struct ice_pf * pf)292 static inline void ice_ptp_init(struct ice_pf *pf) { }
ice_ptp_release(struct ice_pf * pf)293 static inline void ice_ptp_release(struct ice_pf *pf) { }
ice_ptp_link_change(struct ice_pf * pf,u8 port,bool linkup)294 static inline int ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup)
295 { return 0; }
296 #endif /* IS_ENABLED(CONFIG_PTP_1588_CLOCK) */
297 #endif /* _ICE_PTP_H_ */
298
