Searched refs:NUM_DPPCLK_DPM_LEVELS (Results 1 – 14 of 14) sorted by relevance
45 #define NUM_DPPCLK_DPM_LEVELS 4 macro114 uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];
105 #define NUM_DPPCLK_DPM_LEVELS 8 macro124 uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];
105 #define NUM_DPPCLK_DPM_LEVELS 7 macro130 uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];
106 #define NUM_DPPCLK_DPM_LEVELS 8 macro125 uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];
36 #define NUM_DPPCLK_DPM_LEVELS 8 macro1036 uint16_t FreqTableDppClk [NUM_DPPCLK_DPM_LEVELS ]; // In MHz1383 uint16_t FreqTableDppClk [NUM_DPPCLK_DPM_LEVELS ]; // In MHz
39 #define NUM_DPPCLK_DPM_LEVELS 8 macro1074 uint16_t FreqTableDppClk [NUM_DPPCLK_DPM_LEVELS ]; // In MHz1416 uint16_t FreqTableDppClk [NUM_DPPCLK_DPM_LEVELS ]; // In MHz
34 #define NUM_DPPCLK_DPM_LEVELS 4 macro72 uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];
538 …lk_table.entries[i].dppclk_mhz = find_max_clk_value(clock_table->DppClocks, NUM_DPPCLK_DPM_LEVELS); in dcn315_clk_mgr_helper_populate_bw_params()
34 #define NUM_DPPCLK_DPM_LEVELS 8 macro80 uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];
521 clock_table->NumDispClkLevelsEnabled <= NUM_DPPCLK_DPM_LEVELS) { in dcn316_clk_mgr_helper_populate_bw_params()
107 #define NUM_DPPCLK_DPM_LEVELS 8 macro133 uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];
584 clock_table->NumDispClkLevelsEnabled <= NUM_DPPCLK_DPM_LEVELS) { in dcn31_clk_mgr_helper_populate_bw_params()
52 uint32_t DppClocks[NUM_DPPCLK_DPM_LEVELS];
592 clock_table->NumDispClkLevelsEnabled <= NUM_DPPCLK_DPM_LEVELS) { in dcn314_clk_mgr_helper_populate_bw_params()656 …lk_table.entries[i].dppclk_mhz = find_max_clk_value(clock_table->DppClocks, NUM_DPPCLK_DPM_LEVELS); in dcn314_clk_mgr_helper_populate_bw_params()
