Searched refs:M_TX_FIFO_WATERMARK_EN (Results 1 – 5 of 5) sorted by relevance
390 M_TX_FIFO_WATERMARK_EN, true)); in qcom_geni_serial_poll_put_char()392 writel(M_TX_FIFO_WATERMARK_EN, uport->membase + SE_GENI_M_IRQ_CLEAR); in qcom_geni_serial_poll_put_char()444 M_TX_FIFO_WATERMARK_EN, true)) in __qcom_geni_serial_console_write()449 writel(M_TX_FIFO_WATERMARK_EN, uport->membase + in __qcom_geni_serial_console_write()510 writel(irq_en | M_TX_FIFO_WATERMARK_EN, in qcom_geni_serial_console_write()606 irq_en |= M_TX_FIFO_WATERMARK_EN | M_CMD_DONE_EN; in qcom_geni_serial_start_tx()619 irq_en &= ~(M_CMD_DONE_EN | M_TX_FIFO_WATERMARK_EN); in qcom_geni_serial_stop_tx()763 if (!(irq_en & M_TX_FIFO_WATERMARK_EN)) in qcom_geni_serial_handle_tx()764 writel(irq_en | M_TX_FIFO_WATERMARK_EN, in qcom_geni_serial_handle_tx()797 writel(M_TX_FIFO_WATERMARK_EN, in qcom_geni_serial_handle_tx()[all …]
284 val |= M_CMD_DONE_EN | M_TX_FIFO_WATERMARK_EN; in geni_se_select_fifo_mode()310 val &= ~(M_CMD_DONE_EN | M_TX_FIFO_WATERMARK_EN); in geni_se_select_dma_mode()340 val &= ~(M_CMD_DONE_EN | M_TX_FIFO_WATERMARK_EN | in geni_se_select_gpi_mode()
179 #define M_TX_FIFO_WATERMARK_EN BIT(30) macro
829 if (m_irq & M_TX_FIFO_WATERMARK_EN) in geni_spi_isr()
283 m_stat & M_TX_FIFO_WATERMARK_EN) { in geni_i2c_irq()
