Searched refs:MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 (Results 1 – 13 of 13) sorted by relevance
262 MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x0
327 MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x20000
321 MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x100b1
400 MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x0001b099
413 #define MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x16c 0x480 0x000 0x5 0x0 macro
202 MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x1b0b1 /* ETH_PHY_RESET */
154 #define MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x0ac 0x3c0 0x000 0x5 0x0 macro
300 MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x1b088 /* ETH_PHY_RESET */
620 MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x1b0b0 /* SD1 write protect input */
624 MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x1b0b0 /* BATLOW# */
492 fsl,pins = <MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x400120b0>;
823 MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x1b0b0
1163 MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x000b0