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Searched refs:MPCC1_MPCC_TOP_GAIN__MPCC_TOP_GAIN__SHIFT (Results 1 – 13 of 13) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_sh_mask.h10928 #define MPCC1_MPCC_TOP_GAIN__MPCC_TOP_GAIN__SHIFT … macro
Ddcn_3_0_3_sh_mask.h24235 #define MPCC1_MPCC_TOP_GAIN__MPCC_TOP_GAIN__SHIFT … macro
Ddcn_2_1_0_sh_mask.h20314 #define MPCC1_MPCC_TOP_GAIN__MPCC_TOP_GAIN__SHIFT … macro
Ddcn_3_2_1_sh_mask.h15157 #define MPCC1_MPCC_TOP_GAIN__MPCC_TOP_GAIN__SHIFT … macro
Ddcn_3_0_1_sh_mask.h40186 #define MPCC1_MPCC_TOP_GAIN__MPCC_TOP_GAIN__SHIFT … macro
Ddcn_3_1_5_sh_mask.h20665 #define MPCC1_MPCC_TOP_GAIN__MPCC_TOP_GAIN__SHIFT … macro
Ddcn_3_1_2_sh_mask.h22648 #define MPCC1_MPCC_TOP_GAIN__MPCC_TOP_GAIN__SHIFT … macro
Ddcn_3_0_2_sh_mask.h47188 #define MPCC1_MPCC_TOP_GAIN__MPCC_TOP_GAIN__SHIFT … macro
Ddcn_3_1_6_sh_mask.h23406 #define MPCC1_MPCC_TOP_GAIN__MPCC_TOP_GAIN__SHIFT … macro
Ddcn_3_1_4_sh_mask.h55871 #define MPCC1_MPCC_TOP_GAIN__MPCC_TOP_GAIN__SHIFT … macro
Ddcn_3_0_0_sh_mask.h54338 #define MPCC1_MPCC_TOP_GAIN__MPCC_TOP_GAIN__SHIFT … macro
Ddcn_2_0_0_sh_mask.h23382 #define MPCC1_MPCC_TOP_GAIN__MPCC_TOP_GAIN__SHIFT … macro
Ddcn_3_2_0_sh_mask.h15154 #define MPCC1_MPCC_TOP_GAIN__MPCC_TOP_GAIN__SHIFT … macro