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Searched refs:MPCC1_MPCC_CONTROL__MPCC_BG_BPC__SHIFT (Results 1 – 13 of 13) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_sh_mask.h10895 #define MPCC1_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro
Ddcn_3_0_3_sh_mask.h24202 #define MPCC1_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro
Ddcn_2_1_0_sh_mask.h20281 #define MPCC1_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro
Ddcn_3_2_1_sh_mask.h15124 #define MPCC1_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro
Ddcn_3_0_1_sh_mask.h40153 #define MPCC1_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro
Ddcn_3_1_5_sh_mask.h20632 #define MPCC1_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro
Ddcn_3_1_2_sh_mask.h22615 #define MPCC1_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro
Ddcn_3_0_2_sh_mask.h47155 #define MPCC1_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro
Ddcn_3_1_6_sh_mask.h23373 #define MPCC1_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro
Ddcn_3_1_4_sh_mask.h55838 #define MPCC1_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro
Ddcn_3_0_0_sh_mask.h54305 #define MPCC1_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro
Ddcn_2_0_0_sh_mask.h23349 #define MPCC1_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro
Ddcn_3_2_0_sh_mask.h15121 #define MPCC1_MPCC_CONTROL__MPCC_BG_BPC__SHIFT … macro