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Searched refs:MPCC0_MPCC_OPP_ID__MPCC_OPP_ID_MASK (Results 1 – 14 of 14) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_sh_mask.h10795 #define MPCC0_MPCC_OPP_ID__MPCC_OPP_ID_MASK … macro
Ddcn_3_0_3_sh_mask.h24113 #define MPCC0_MPCC_OPP_ID__MPCC_OPP_ID_MASK … macro
Ddcn_2_1_0_sh_mask.h20179 #define MPCC0_MPCC_OPP_ID__MPCC_OPP_ID_MASK … macro
Ddcn_3_2_1_sh_mask.h15030 #define MPCC0_MPCC_OPP_ID__MPCC_OPP_ID_MASK … macro
Ddcn_3_0_1_sh_mask.h40064 #define MPCC0_MPCC_OPP_ID__MPCC_OPP_ID_MASK … macro
Ddcn_1_0_sh_mask.h18805 #define MPCC0_MPCC_OPP_ID__MPCC_OPP_ID_MASK … macro
Ddcn_3_1_5_sh_mask.h20543 #define MPCC0_MPCC_OPP_ID__MPCC_OPP_ID_MASK … macro
Ddcn_3_1_2_sh_mask.h22526 #define MPCC0_MPCC_OPP_ID__MPCC_OPP_ID_MASK … macro
Ddcn_3_0_2_sh_mask.h47066 #define MPCC0_MPCC_OPP_ID__MPCC_OPP_ID_MASK … macro
Ddcn_3_1_6_sh_mask.h23284 #define MPCC0_MPCC_OPP_ID__MPCC_OPP_ID_MASK … macro
Ddcn_3_1_4_sh_mask.h55749 #define MPCC0_MPCC_OPP_ID__MPCC_OPP_ID_MASK … macro
Ddcn_3_0_0_sh_mask.h54216 #define MPCC0_MPCC_OPP_ID__MPCC_OPP_ID_MASK … macro
Ddcn_2_0_0_sh_mask.h23247 #define MPCC0_MPCC_OPP_ID__MPCC_OPP_ID_MASK … macro
Ddcn_3_2_0_sh_mask.h15027 #define MPCC0_MPCC_OPP_ID__MPCC_OPP_ID_MASK … macro