1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * drivers/net/phy/marvell.c
4 *
5 * Driver for Marvell PHYs
6 *
7 * Author: Andy Fleming
8 *
9 * Copyright (c) 2004 Freescale Semiconductor, Inc.
10 *
11 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
12 */
13 #include <linux/kernel.h>
14 #include <linux/string.h>
15 #include <linux/ctype.h>
16 #include <linux/errno.h>
17 #include <linux/unistd.h>
18 #include <linux/hwmon.h>
19 #include <linux/interrupt.h>
20 #include <linux/init.h>
21 #include <linux/delay.h>
22 #include <linux/netdevice.h>
23 #include <linux/etherdevice.h>
24 #include <linux/skbuff.h>
25 #include <linux/spinlock.h>
26 #include <linux/mm.h>
27 #include <linux/module.h>
28 #include <linux/mii.h>
29 #include <linux/ethtool.h>
30 #include <linux/ethtool_netlink.h>
31 #include <linux/phy.h>
32 #include <linux/marvell_phy.h>
33 #include <linux/bitfield.h>
34 #include <linux/of.h>
35 #include <linux/sfp.h>
36
37 #include <linux/io.h>
38 #include <asm/irq.h>
39 #include <linux/uaccess.h>
40
41 #define MII_MARVELL_PHY_PAGE 22
42 #define MII_MARVELL_COPPER_PAGE 0x00
43 #define MII_MARVELL_FIBER_PAGE 0x01
44 #define MII_MARVELL_MSCR_PAGE 0x02
45 #define MII_MARVELL_LED_PAGE 0x03
46 #define MII_MARVELL_VCT5_PAGE 0x05
47 #define MII_MARVELL_MISC_TEST_PAGE 0x06
48 #define MII_MARVELL_VCT7_PAGE 0x07
49 #define MII_MARVELL_WOL_PAGE 0x11
50 #define MII_MARVELL_MODE_PAGE 0x12
51
52 #define MII_M1011_IEVENT 0x13
53 #define MII_M1011_IEVENT_CLEAR 0x0000
54
55 #define MII_M1011_IMASK 0x12
56 #define MII_M1011_IMASK_INIT 0x6400
57 #define MII_M1011_IMASK_CLEAR 0x0000
58
59 #define MII_M1011_PHY_SCR 0x10
60 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
61 #define MII_M1011_PHY_SCR_DOWNSHIFT_MASK GENMASK(14, 12)
62 #define MII_M1011_PHY_SCR_DOWNSHIFT_MAX 8
63 #define MII_M1011_PHY_SCR_MDI (0x0 << 5)
64 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
65 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
66
67 #define MII_M1011_PHY_SSR 0x11
68 #define MII_M1011_PHY_SSR_DOWNSHIFT BIT(5)
69
70 #define MII_M1111_PHY_LED_CONTROL 0x18
71 #define MII_M1111_PHY_LED_DIRECT 0x4100
72 #define MII_M1111_PHY_LED_COMBINE 0x411c
73 #define MII_M1111_PHY_EXT_CR 0x14
74 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK GENMASK(11, 9)
75 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX 8
76 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN BIT(8)
77 #define MII_M1111_RGMII_RX_DELAY BIT(7)
78 #define MII_M1111_RGMII_TX_DELAY BIT(1)
79 #define MII_M1111_PHY_EXT_SR 0x1b
80
81 #define MII_M1111_HWCFG_MODE_MASK 0xf
82 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
83 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
84 #define MII_M1111_HWCFG_MODE_RTBI 0x7
85 #define MII_M1111_HWCFG_MODE_COPPER_1000X_AN 0x8
86 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
87 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
88 #define MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN 0xc
89 #define MII_M1111_HWCFG_SERIAL_AN_BYPASS BIT(12)
90 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
91 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
92
93 #define MII_88E1121_PHY_MSCR_REG 21
94 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
95 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
96 #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4))
97
98 #define MII_88E1121_MISC_TEST 0x1a
99 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
100 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
101 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
102 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
103 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
104 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
105
106 #define MII_88E1510_TEMP_SENSOR 0x1b
107 #define MII_88E1510_TEMP_SENSOR_MASK 0xff
108
109 #define MII_88E1540_COPPER_CTRL3 0x1a
110 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK GENMASK(11, 10)
111 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS 0
112 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS 1
113 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS 2
114 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS 3
115 #define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN BIT(9)
116
117 #define MII_88E6390_MISC_TEST 0x1b
118 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S (0x0 << 14)
119 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE (0x1 << 14)
120 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_ONESHOT (0x2 << 14)
121 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE (0x3 << 14)
122 #define MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK (0x3 << 14)
123 #define MII_88E6393_MISC_TEST_SAMPLES_2048 (0x0 << 11)
124 #define MII_88E6393_MISC_TEST_SAMPLES_4096 (0x1 << 11)
125 #define MII_88E6393_MISC_TEST_SAMPLES_8192 (0x2 << 11)
126 #define MII_88E6393_MISC_TEST_SAMPLES_16384 (0x3 << 11)
127 #define MII_88E6393_MISC_TEST_SAMPLES_MASK (0x3 << 11)
128 #define MII_88E6393_MISC_TEST_RATE_2_3MS (0x5 << 8)
129 #define MII_88E6393_MISC_TEST_RATE_6_4MS (0x6 << 8)
130 #define MII_88E6393_MISC_TEST_RATE_11_9MS (0x7 << 8)
131 #define MII_88E6393_MISC_TEST_RATE_MASK (0x7 << 8)
132
133 #define MII_88E6390_TEMP_SENSOR 0x1c
134 #define MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK 0xff00
135 #define MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT 8
136 #define MII_88E6390_TEMP_SENSOR_MASK 0xff
137 #define MII_88E6390_TEMP_SENSOR_SAMPLES 10
138
139 #define MII_88E1318S_PHY_MSCR1_REG 16
140 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
141
142 /* Copper Specific Interrupt Enable Register */
143 #define MII_88E1318S_PHY_CSIER 0x12
144 /* WOL Event Interrupt Enable */
145 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
146
147 /* LED Timer Control Register */
148 #define MII_88E1318S_PHY_LED_TCR 0x12
149 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
150 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
151 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
152
153 /* Magic Packet MAC address registers */
154 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
155 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
156 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
157
158 #define MII_88E1318S_PHY_WOL_CTRL 0x10
159 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
160 #define MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE BIT(13)
161 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
162
163 #define MII_PHY_LED_CTRL 16
164 #define MII_88E1121_PHY_LED_DEF 0x0030
165 #define MII_88E1510_PHY_LED_DEF 0x1177
166 #define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE 0x1040
167
168 #define MII_M1011_PHY_STATUS 0x11
169 #define MII_M1011_PHY_STATUS_1000 0x8000
170 #define MII_M1011_PHY_STATUS_100 0x4000
171 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
172 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
173 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800
174 #define MII_M1011_PHY_STATUS_LINK 0x0400
175
176 #define MII_88E3016_PHY_SPEC_CTRL 0x10
177 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200
178 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
179
180 #define MII_88E1510_GEN_CTRL_REG_1 0x14
181 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
182 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII 0x0 /* RGMII to copper */
183 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
184 /* RGMII to 1000BASE-X */
185 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X 0x2
186 /* RGMII to 100BASE-FX */
187 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX 0x3
188 /* RGMII to SGMII */
189 #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII 0x4
190 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
191
192 #define MII_88E1510_MSCR_2 0x15
193
194 #define MII_VCT5_TX_RX_MDI0_COUPLING 0x10
195 #define MII_VCT5_TX_RX_MDI1_COUPLING 0x11
196 #define MII_VCT5_TX_RX_MDI2_COUPLING 0x12
197 #define MII_VCT5_TX_RX_MDI3_COUPLING 0x13
198 #define MII_VCT5_TX_RX_AMPLITUDE_MASK 0x7f00
199 #define MII_VCT5_TX_RX_AMPLITUDE_SHIFT 8
200 #define MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION BIT(15)
201
202 #define MII_VCT5_CTRL 0x17
203 #define MII_VCT5_CTRL_ENABLE BIT(15)
204 #define MII_VCT5_CTRL_COMPLETE BIT(14)
205 #define MII_VCT5_CTRL_TX_SAME_CHANNEL (0x0 << 11)
206 #define MII_VCT5_CTRL_TX0_CHANNEL (0x4 << 11)
207 #define MII_VCT5_CTRL_TX1_CHANNEL (0x5 << 11)
208 #define MII_VCT5_CTRL_TX2_CHANNEL (0x6 << 11)
209 #define MII_VCT5_CTRL_TX3_CHANNEL (0x7 << 11)
210 #define MII_VCT5_CTRL_SAMPLES_2 (0x0 << 8)
211 #define MII_VCT5_CTRL_SAMPLES_4 (0x1 << 8)
212 #define MII_VCT5_CTRL_SAMPLES_8 (0x2 << 8)
213 #define MII_VCT5_CTRL_SAMPLES_16 (0x3 << 8)
214 #define MII_VCT5_CTRL_SAMPLES_32 (0x4 << 8)
215 #define MII_VCT5_CTRL_SAMPLES_64 (0x5 << 8)
216 #define MII_VCT5_CTRL_SAMPLES_128 (0x6 << 8)
217 #define MII_VCT5_CTRL_SAMPLES_DEFAULT (0x6 << 8)
218 #define MII_VCT5_CTRL_SAMPLES_256 (0x7 << 8)
219 #define MII_VCT5_CTRL_SAMPLES_SHIFT 8
220 #define MII_VCT5_CTRL_MODE_MAXIMUM_PEEK (0x0 << 6)
221 #define MII_VCT5_CTRL_MODE_FIRST_LAST_PEEK (0x1 << 6)
222 #define MII_VCT5_CTRL_MODE_OFFSET (0x2 << 6)
223 #define MII_VCT5_CTRL_SAMPLE_POINT (0x3 << 6)
224 #define MII_VCT5_CTRL_PEEK_HYST_DEFAULT 3
225
226 #define MII_VCT5_SAMPLE_POINT_DISTANCE 0x18
227 #define MII_VCT5_SAMPLE_POINT_DISTANCE_MAX 511
228 #define MII_VCT5_TX_PULSE_CTRL 0x1c
229 #define MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN BIT(12)
230 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS (0x0 << 10)
231 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_96nS (0x1 << 10)
232 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_64nS (0x2 << 10)
233 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS (0x3 << 10)
234 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_SHIFT 10
235 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_1000mV (0x0 << 8)
236 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_750mV (0x1 << 8)
237 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_500mV (0x2 << 8)
238 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_250mV (0x3 << 8)
239 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_SHIFT 8
240 #define MII_VCT5_TX_PULSE_CTRL_MAX_AMP BIT(7)
241 #define MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV (0x6 << 0)
242
243 /* For TDR measurements less than 11 meters, a short pulse should be
244 * used.
245 */
246 #define TDR_SHORT_CABLE_LENGTH 11
247
248 #define MII_VCT7_PAIR_0_DISTANCE 0x10
249 #define MII_VCT7_PAIR_1_DISTANCE 0x11
250 #define MII_VCT7_PAIR_2_DISTANCE 0x12
251 #define MII_VCT7_PAIR_3_DISTANCE 0x13
252
253 #define MII_VCT7_RESULTS 0x14
254 #define MII_VCT7_RESULTS_PAIR3_MASK 0xf000
255 #define MII_VCT7_RESULTS_PAIR2_MASK 0x0f00
256 #define MII_VCT7_RESULTS_PAIR1_MASK 0x00f0
257 #define MII_VCT7_RESULTS_PAIR0_MASK 0x000f
258 #define MII_VCT7_RESULTS_PAIR3_SHIFT 12
259 #define MII_VCT7_RESULTS_PAIR2_SHIFT 8
260 #define MII_VCT7_RESULTS_PAIR1_SHIFT 4
261 #define MII_VCT7_RESULTS_PAIR0_SHIFT 0
262 #define MII_VCT7_RESULTS_INVALID 0
263 #define MII_VCT7_RESULTS_OK 1
264 #define MII_VCT7_RESULTS_OPEN 2
265 #define MII_VCT7_RESULTS_SAME_SHORT 3
266 #define MII_VCT7_RESULTS_CROSS_SHORT 4
267 #define MII_VCT7_RESULTS_BUSY 9
268
269 #define MII_VCT7_CTRL 0x15
270 #define MII_VCT7_CTRL_RUN_NOW BIT(15)
271 #define MII_VCT7_CTRL_RUN_ANEG BIT(14)
272 #define MII_VCT7_CTRL_DISABLE_CROSS BIT(13)
273 #define MII_VCT7_CTRL_RUN_AFTER_BREAK_LINK BIT(12)
274 #define MII_VCT7_CTRL_IN_PROGRESS BIT(11)
275 #define MII_VCT7_CTRL_METERS BIT(10)
276 #define MII_VCT7_CTRL_CENTIMETERS 0
277
278 #define LPA_PAUSE_FIBER 0x180
279 #define LPA_PAUSE_ASYM_FIBER 0x100
280
281 #define NB_FIBER_STATS 1
282
283 MODULE_DESCRIPTION("Marvell PHY driver");
284 MODULE_AUTHOR("Andy Fleming");
285 MODULE_LICENSE("GPL");
286
287 struct marvell_hw_stat {
288 const char *string;
289 u8 page;
290 u8 reg;
291 u8 bits;
292 };
293
294 static struct marvell_hw_stat marvell_hw_stats[] = {
295 { "phy_receive_errors_copper", 0, 21, 16},
296 { "phy_idle_errors", 0, 10, 8 },
297 { "phy_receive_errors_fiber", 1, 21, 16},
298 };
299
300 struct marvell_priv {
301 u64 stats[ARRAY_SIZE(marvell_hw_stats)];
302 char *hwmon_name;
303 struct device *hwmon_dev;
304 bool cable_test_tdr;
305 u32 first;
306 u32 last;
307 u32 step;
308 s8 pair;
309 };
310
marvell_read_page(struct phy_device * phydev)311 static int marvell_read_page(struct phy_device *phydev)
312 {
313 return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
314 }
315
marvell_write_page(struct phy_device * phydev,int page)316 static int marvell_write_page(struct phy_device *phydev, int page)
317 {
318 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
319 }
320
marvell_set_page(struct phy_device * phydev,int page)321 static int marvell_set_page(struct phy_device *phydev, int page)
322 {
323 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
324 }
325
marvell_ack_interrupt(struct phy_device * phydev)326 static int marvell_ack_interrupt(struct phy_device *phydev)
327 {
328 int err;
329
330 /* Clear the interrupts by reading the reg */
331 err = phy_read(phydev, MII_M1011_IEVENT);
332
333 if (err < 0)
334 return err;
335
336 return 0;
337 }
338
marvell_config_intr(struct phy_device * phydev)339 static int marvell_config_intr(struct phy_device *phydev)
340 {
341 int err;
342
343 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
344 err = marvell_ack_interrupt(phydev);
345 if (err)
346 return err;
347
348 err = phy_write(phydev, MII_M1011_IMASK,
349 MII_M1011_IMASK_INIT);
350 } else {
351 err = phy_write(phydev, MII_M1011_IMASK,
352 MII_M1011_IMASK_CLEAR);
353 if (err)
354 return err;
355
356 err = marvell_ack_interrupt(phydev);
357 }
358
359 return err;
360 }
361
marvell_handle_interrupt(struct phy_device * phydev)362 static irqreturn_t marvell_handle_interrupt(struct phy_device *phydev)
363 {
364 int irq_status;
365
366 irq_status = phy_read(phydev, MII_M1011_IEVENT);
367 if (irq_status < 0) {
368 phy_error(phydev);
369 return IRQ_NONE;
370 }
371
372 if (!(irq_status & MII_M1011_IMASK_INIT))
373 return IRQ_NONE;
374
375 phy_trigger_machine(phydev);
376
377 return IRQ_HANDLED;
378 }
379
marvell_set_polarity(struct phy_device * phydev,int polarity)380 static int marvell_set_polarity(struct phy_device *phydev, int polarity)
381 {
382 u16 val;
383
384 switch (polarity) {
385 case ETH_TP_MDI:
386 val = MII_M1011_PHY_SCR_MDI;
387 break;
388 case ETH_TP_MDI_X:
389 val = MII_M1011_PHY_SCR_MDI_X;
390 break;
391 case ETH_TP_MDI_AUTO:
392 case ETH_TP_MDI_INVALID:
393 default:
394 val = MII_M1011_PHY_SCR_AUTO_CROSS;
395 break;
396 }
397
398 return phy_modify_changed(phydev, MII_M1011_PHY_SCR,
399 MII_M1011_PHY_SCR_AUTO_CROSS, val);
400 }
401
marvell_config_aneg(struct phy_device * phydev)402 static int marvell_config_aneg(struct phy_device *phydev)
403 {
404 int changed = 0;
405 int err;
406
407 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
408 if (err < 0)
409 return err;
410
411 changed = err;
412
413 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
414 MII_M1111_PHY_LED_DIRECT);
415 if (err < 0)
416 return err;
417
418 err = genphy_config_aneg(phydev);
419 if (err < 0)
420 return err;
421
422 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
423 /* A write to speed/duplex bits (that is performed by
424 * genphy_config_aneg() call above) must be followed by
425 * a software reset. Otherwise, the write has no effect.
426 */
427 err = genphy_soft_reset(phydev);
428 if (err < 0)
429 return err;
430 }
431
432 return 0;
433 }
434
m88e1101_config_aneg(struct phy_device * phydev)435 static int m88e1101_config_aneg(struct phy_device *phydev)
436 {
437 int err;
438
439 /* This Marvell PHY has an errata which requires
440 * that certain registers get written in order
441 * to restart autonegotiation
442 */
443 err = genphy_soft_reset(phydev);
444 if (err < 0)
445 return err;
446
447 err = phy_write(phydev, 0x1d, 0x1f);
448 if (err < 0)
449 return err;
450
451 err = phy_write(phydev, 0x1e, 0x200c);
452 if (err < 0)
453 return err;
454
455 err = phy_write(phydev, 0x1d, 0x5);
456 if (err < 0)
457 return err;
458
459 err = phy_write(phydev, 0x1e, 0);
460 if (err < 0)
461 return err;
462
463 err = phy_write(phydev, 0x1e, 0x100);
464 if (err < 0)
465 return err;
466
467 return marvell_config_aneg(phydev);
468 }
469
470 #if IS_ENABLED(CONFIG_OF_MDIO)
471 /* Set and/or override some configuration registers based on the
472 * marvell,reg-init property stored in the of_node for the phydev.
473 *
474 * marvell,reg-init = <reg-page reg mask value>,...;
475 *
476 * There may be one or more sets of <reg-page reg mask value>:
477 *
478 * reg-page: which register bank to use.
479 * reg: the register.
480 * mask: if non-zero, ANDed with existing register value.
481 * value: ORed with the masked value and written to the regiser.
482 *
483 */
marvell_of_reg_init(struct phy_device * phydev)484 static int marvell_of_reg_init(struct phy_device *phydev)
485 {
486 const __be32 *paddr;
487 int len, i, saved_page, current_page, ret = 0;
488
489 if (!phydev->mdio.dev.of_node)
490 return 0;
491
492 paddr = of_get_property(phydev->mdio.dev.of_node,
493 "marvell,reg-init", &len);
494 if (!paddr || len < (4 * sizeof(*paddr)))
495 return 0;
496
497 saved_page = phy_save_page(phydev);
498 if (saved_page < 0)
499 goto err;
500 current_page = saved_page;
501
502 len /= sizeof(*paddr);
503 for (i = 0; i < len - 3; i += 4) {
504 u16 page = be32_to_cpup(paddr + i);
505 u16 reg = be32_to_cpup(paddr + i + 1);
506 u16 mask = be32_to_cpup(paddr + i + 2);
507 u16 val_bits = be32_to_cpup(paddr + i + 3);
508 int val;
509
510 if (page != current_page) {
511 current_page = page;
512 ret = marvell_write_page(phydev, page);
513 if (ret < 0)
514 goto err;
515 }
516
517 val = 0;
518 if (mask) {
519 val = __phy_read(phydev, reg);
520 if (val < 0) {
521 ret = val;
522 goto err;
523 }
524 val &= mask;
525 }
526 val |= val_bits;
527
528 ret = __phy_write(phydev, reg, val);
529 if (ret < 0)
530 goto err;
531 }
532 err:
533 return phy_restore_page(phydev, saved_page, ret);
534 }
535 #else
marvell_of_reg_init(struct phy_device * phydev)536 static int marvell_of_reg_init(struct phy_device *phydev)
537 {
538 return 0;
539 }
540 #endif /* CONFIG_OF_MDIO */
541
m88e1121_config_aneg_rgmii_delays(struct phy_device * phydev)542 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
543 {
544 int mscr;
545
546 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
547 mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
548 MII_88E1121_PHY_MSCR_TX_DELAY;
549 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
550 mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
551 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
552 mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
553 else
554 mscr = 0;
555
556 return phy_modify_paged_changed(phydev, MII_MARVELL_MSCR_PAGE,
557 MII_88E1121_PHY_MSCR_REG,
558 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
559 }
560
m88e1121_config_aneg(struct phy_device * phydev)561 static int m88e1121_config_aneg(struct phy_device *phydev)
562 {
563 int changed = 0;
564 int err = 0;
565
566 if (phy_interface_is_rgmii(phydev)) {
567 err = m88e1121_config_aneg_rgmii_delays(phydev);
568 if (err < 0)
569 return err;
570 }
571
572 changed = err;
573
574 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
575 if (err < 0)
576 return err;
577
578 changed |= err;
579
580 err = genphy_config_aneg(phydev);
581 if (err < 0)
582 return err;
583
584 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
585 /* A software reset is used to ensure a "commit" of the
586 * changes is done.
587 */
588 err = genphy_soft_reset(phydev);
589 if (err < 0)
590 return err;
591 }
592
593 return 0;
594 }
595
m88e1318_config_aneg(struct phy_device * phydev)596 static int m88e1318_config_aneg(struct phy_device *phydev)
597 {
598 int err;
599
600 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
601 MII_88E1318S_PHY_MSCR1_REG,
602 0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
603 if (err < 0)
604 return err;
605
606 return m88e1121_config_aneg(phydev);
607 }
608
609 /**
610 * linkmode_adv_to_fiber_adv_t
611 * @advertise: the linkmode advertisement settings
612 *
613 * A small helper function that translates linkmode advertisement
614 * settings to phy autonegotiation advertisements for the MII_ADV
615 * register for fiber link.
616 */
linkmode_adv_to_fiber_adv_t(unsigned long * advertise)617 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
618 {
619 u32 result = 0;
620
621 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
622 result |= ADVERTISE_1000XHALF;
623 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
624 result |= ADVERTISE_1000XFULL;
625
626 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
627 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
628 result |= ADVERTISE_1000XPSE_ASYM;
629 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
630 result |= ADVERTISE_1000XPAUSE;
631
632 return result;
633 }
634
635 /**
636 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
637 * @phydev: target phy_device struct
638 *
639 * Description: If auto-negotiation is enabled, we configure the
640 * advertising, and then restart auto-negotiation. If it is not
641 * enabled, then we write the BMCR. Adapted for fiber link in
642 * some Marvell's devices.
643 */
marvell_config_aneg_fiber(struct phy_device * phydev)644 static int marvell_config_aneg_fiber(struct phy_device *phydev)
645 {
646 int changed = 0;
647 int err;
648 u16 adv;
649
650 if (phydev->autoneg != AUTONEG_ENABLE)
651 return genphy_setup_forced(phydev);
652
653 /* Only allow advertising what this PHY supports */
654 linkmode_and(phydev->advertising, phydev->advertising,
655 phydev->supported);
656
657 adv = linkmode_adv_to_fiber_adv_t(phydev->advertising);
658
659 /* Setup fiber advertisement */
660 err = phy_modify_changed(phydev, MII_ADVERTISE,
661 ADVERTISE_1000XHALF | ADVERTISE_1000XFULL |
662 ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM,
663 adv);
664 if (err < 0)
665 return err;
666 if (err > 0)
667 changed = 1;
668
669 return genphy_check_and_restart_aneg(phydev, changed);
670 }
671
m88e1111_config_aneg(struct phy_device * phydev)672 static int m88e1111_config_aneg(struct phy_device *phydev)
673 {
674 int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
675 int err;
676
677 if (extsr < 0)
678 return extsr;
679
680 /* If not using SGMII or copper 1000BaseX modes, use normal process.
681 * Steps below are only required for these modes.
682 */
683 if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&
684 (extsr & MII_M1111_HWCFG_MODE_MASK) !=
685 MII_M1111_HWCFG_MODE_COPPER_1000X_AN)
686 return marvell_config_aneg(phydev);
687
688 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
689 if (err < 0)
690 goto error;
691
692 /* Configure the copper link first */
693 err = marvell_config_aneg(phydev);
694 if (err < 0)
695 goto error;
696
697 /* Then the fiber link */
698 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
699 if (err < 0)
700 goto error;
701
702 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
703 /* Do not touch the fiber advertisement if we're in copper->sgmii mode.
704 * Just ensure that SGMII-side autonegotiation is enabled.
705 * If we switched from some other mode to SGMII it may not be.
706 */
707 err = genphy_check_and_restart_aneg(phydev, false);
708 else
709 err = marvell_config_aneg_fiber(phydev);
710 if (err < 0)
711 goto error;
712
713 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
714
715 error:
716 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
717 return err;
718 }
719
m88e1510_config_aneg(struct phy_device * phydev)720 static int m88e1510_config_aneg(struct phy_device *phydev)
721 {
722 int err;
723
724 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
725 if (err < 0)
726 goto error;
727
728 /* Configure the copper link first */
729 err = m88e1318_config_aneg(phydev);
730 if (err < 0)
731 goto error;
732
733 /* Do not touch the fiber page if we're in copper->sgmii mode */
734 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
735 return 0;
736
737 /* Then the fiber link */
738 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
739 if (err < 0)
740 goto error;
741
742 err = marvell_config_aneg_fiber(phydev);
743 if (err < 0)
744 goto error;
745
746 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
747
748 error:
749 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
750 return err;
751 }
752
marvell_config_led(struct phy_device * phydev)753 static void marvell_config_led(struct phy_device *phydev)
754 {
755 u16 def_config;
756 int err;
757
758 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
759 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
760 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
761 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
762 def_config = MII_88E1121_PHY_LED_DEF;
763 break;
764 /* Default PHY LED config:
765 * LED[0] .. 1000Mbps Link
766 * LED[1] .. 100Mbps Link
767 * LED[2] .. Blink, Activity
768 */
769 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
770 if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE)
771 def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE;
772 else
773 def_config = MII_88E1510_PHY_LED_DEF;
774 break;
775 default:
776 return;
777 }
778
779 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
780 def_config);
781 if (err < 0)
782 phydev_warn(phydev, "Fail to config marvell phy LED.\n");
783 }
784
marvell_config_init(struct phy_device * phydev)785 static int marvell_config_init(struct phy_device *phydev)
786 {
787 /* Set default LED */
788 marvell_config_led(phydev);
789
790 /* Set registers from marvell,reg-init DT property */
791 return marvell_of_reg_init(phydev);
792 }
793
m88e3016_config_init(struct phy_device * phydev)794 static int m88e3016_config_init(struct phy_device *phydev)
795 {
796 int ret;
797
798 /* Enable Scrambler and Auto-Crossover */
799 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
800 MII_88E3016_DISABLE_SCRAMBLER,
801 MII_88E3016_AUTO_MDIX_CROSSOVER);
802 if (ret < 0)
803 return ret;
804
805 return marvell_config_init(phydev);
806 }
807
m88e1111_config_init_hwcfg_mode(struct phy_device * phydev,u16 mode,int fibre_copper_auto)808 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
809 u16 mode,
810 int fibre_copper_auto)
811 {
812 if (fibre_copper_auto)
813 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
814
815 return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
816 MII_M1111_HWCFG_MODE_MASK |
817 MII_M1111_HWCFG_FIBER_COPPER_AUTO |
818 MII_M1111_HWCFG_FIBER_COPPER_RES,
819 mode);
820 }
821
m88e1111_config_init_rgmii_delays(struct phy_device * phydev)822 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
823 {
824 int delay;
825
826 switch (phydev->interface) {
827 case PHY_INTERFACE_MODE_RGMII_ID:
828 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
829 break;
830 case PHY_INTERFACE_MODE_RGMII_RXID:
831 delay = MII_M1111_RGMII_RX_DELAY;
832 break;
833 case PHY_INTERFACE_MODE_RGMII_TXID:
834 delay = MII_M1111_RGMII_TX_DELAY;
835 break;
836 default:
837 delay = 0;
838 break;
839 }
840
841 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
842 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
843 delay);
844 }
845
m88e1111_config_init_rgmii(struct phy_device * phydev)846 static int m88e1111_config_init_rgmii(struct phy_device *phydev)
847 {
848 int temp;
849 int err;
850
851 err = m88e1111_config_init_rgmii_delays(phydev);
852 if (err < 0)
853 return err;
854
855 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
856 if (temp < 0)
857 return temp;
858
859 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
860
861 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
862 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
863 else
864 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
865
866 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
867 }
868
m88e1111_config_init_sgmii(struct phy_device * phydev)869 static int m88e1111_config_init_sgmii(struct phy_device *phydev)
870 {
871 int err;
872
873 err = m88e1111_config_init_hwcfg_mode(
874 phydev,
875 MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
876 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
877 if (err < 0)
878 return err;
879
880 /* make sure copper is selected */
881 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
882 }
883
m88e1111_config_init_rtbi(struct phy_device * phydev)884 static int m88e1111_config_init_rtbi(struct phy_device *phydev)
885 {
886 int err;
887
888 err = m88e1111_config_init_rgmii_delays(phydev);
889 if (err < 0)
890 return err;
891
892 err = m88e1111_config_init_hwcfg_mode(
893 phydev,
894 MII_M1111_HWCFG_MODE_RTBI,
895 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
896 if (err < 0)
897 return err;
898
899 /* soft reset */
900 err = genphy_soft_reset(phydev);
901 if (err < 0)
902 return err;
903
904 return m88e1111_config_init_hwcfg_mode(
905 phydev,
906 MII_M1111_HWCFG_MODE_RTBI,
907 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
908 }
909
m88e1111_config_init_1000basex(struct phy_device * phydev)910 static int m88e1111_config_init_1000basex(struct phy_device *phydev)
911 {
912 int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
913 int err, mode;
914
915 if (extsr < 0)
916 return extsr;
917
918 /* If using copper mode, ensure 1000BaseX auto-negotiation is enabled */
919 mode = extsr & MII_M1111_HWCFG_MODE_MASK;
920 if (mode == MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN) {
921 err = phy_modify(phydev, MII_M1111_PHY_EXT_SR,
922 MII_M1111_HWCFG_MODE_MASK |
923 MII_M1111_HWCFG_SERIAL_AN_BYPASS,
924 MII_M1111_HWCFG_MODE_COPPER_1000X_AN |
925 MII_M1111_HWCFG_SERIAL_AN_BYPASS);
926 if (err < 0)
927 return err;
928 }
929 return 0;
930 }
931
m88e1111_config_init(struct phy_device * phydev)932 static int m88e1111_config_init(struct phy_device *phydev)
933 {
934 int err;
935
936 if (phy_interface_is_rgmii(phydev)) {
937 err = m88e1111_config_init_rgmii(phydev);
938 if (err < 0)
939 return err;
940 }
941
942 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
943 err = m88e1111_config_init_sgmii(phydev);
944 if (err < 0)
945 return err;
946 }
947
948 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
949 err = m88e1111_config_init_rtbi(phydev);
950 if (err < 0)
951 return err;
952 }
953
954 if (phydev->interface == PHY_INTERFACE_MODE_1000BASEX) {
955 err = m88e1111_config_init_1000basex(phydev);
956 if (err < 0)
957 return err;
958 }
959
960 err = marvell_of_reg_init(phydev);
961 if (err < 0)
962 return err;
963
964 err = genphy_soft_reset(phydev);
965 if (err < 0)
966 return err;
967
968 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
969 /* If the HWCFG_MODE was changed from another mode (such as
970 * 1000BaseX) to SGMII, the state of the support bits may have
971 * also changed now that the PHY has been reset.
972 * Update the PHY abilities accordingly.
973 */
974 err = genphy_read_abilities(phydev);
975 linkmode_or(phydev->advertising, phydev->advertising,
976 phydev->supported);
977 }
978 return err;
979 }
980
m88e1111_get_downshift(struct phy_device * phydev,u8 * data)981 static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data)
982 {
983 int val, cnt, enable;
984
985 val = phy_read(phydev, MII_M1111_PHY_EXT_CR);
986 if (val < 0)
987 return val;
988
989 enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val);
990 cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1;
991
992 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
993
994 return 0;
995 }
996
m88e1111_set_downshift(struct phy_device * phydev,u8 cnt)997 static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt)
998 {
999 int val, err;
1000
1001 if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX)
1002 return -E2BIG;
1003
1004 if (!cnt) {
1005 err = phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR,
1006 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN);
1007 } else {
1008 val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN;
1009 val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1);
1010
1011 err = phy_modify(phydev, MII_M1111_PHY_EXT_CR,
1012 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN |
1013 MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK,
1014 val);
1015 }
1016
1017 if (err < 0)
1018 return err;
1019
1020 return genphy_soft_reset(phydev);
1021 }
1022
m88e1111_get_tunable(struct phy_device * phydev,struct ethtool_tunable * tuna,void * data)1023 static int m88e1111_get_tunable(struct phy_device *phydev,
1024 struct ethtool_tunable *tuna, void *data)
1025 {
1026 switch (tuna->id) {
1027 case ETHTOOL_PHY_DOWNSHIFT:
1028 return m88e1111_get_downshift(phydev, data);
1029 default:
1030 return -EOPNOTSUPP;
1031 }
1032 }
1033
m88e1111_set_tunable(struct phy_device * phydev,struct ethtool_tunable * tuna,const void * data)1034 static int m88e1111_set_tunable(struct phy_device *phydev,
1035 struct ethtool_tunable *tuna, const void *data)
1036 {
1037 switch (tuna->id) {
1038 case ETHTOOL_PHY_DOWNSHIFT:
1039 return m88e1111_set_downshift(phydev, *(const u8 *)data);
1040 default:
1041 return -EOPNOTSUPP;
1042 }
1043 }
1044
m88e1011_get_downshift(struct phy_device * phydev,u8 * data)1045 static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data)
1046 {
1047 int val, cnt, enable;
1048
1049 val = phy_read(phydev, MII_M1011_PHY_SCR);
1050 if (val < 0)
1051 return val;
1052
1053 enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val);
1054 cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1;
1055
1056 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
1057
1058 return 0;
1059 }
1060
m88e1011_set_downshift(struct phy_device * phydev,u8 cnt)1061 static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt)
1062 {
1063 int val, err;
1064
1065 if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX)
1066 return -E2BIG;
1067
1068 if (!cnt) {
1069 err = phy_clear_bits(phydev, MII_M1011_PHY_SCR,
1070 MII_M1011_PHY_SCR_DOWNSHIFT_EN);
1071 } else {
1072 val = MII_M1011_PHY_SCR_DOWNSHIFT_EN;
1073 val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1);
1074
1075 err = phy_modify(phydev, MII_M1011_PHY_SCR,
1076 MII_M1011_PHY_SCR_DOWNSHIFT_EN |
1077 MII_M1011_PHY_SCR_DOWNSHIFT_MASK,
1078 val);
1079 }
1080
1081 if (err < 0)
1082 return err;
1083
1084 return genphy_soft_reset(phydev);
1085 }
1086
m88e1011_get_tunable(struct phy_device * phydev,struct ethtool_tunable * tuna,void * data)1087 static int m88e1011_get_tunable(struct phy_device *phydev,
1088 struct ethtool_tunable *tuna, void *data)
1089 {
1090 switch (tuna->id) {
1091 case ETHTOOL_PHY_DOWNSHIFT:
1092 return m88e1011_get_downshift(phydev, data);
1093 default:
1094 return -EOPNOTSUPP;
1095 }
1096 }
1097
m88e1011_set_tunable(struct phy_device * phydev,struct ethtool_tunable * tuna,const void * data)1098 static int m88e1011_set_tunable(struct phy_device *phydev,
1099 struct ethtool_tunable *tuna, const void *data)
1100 {
1101 switch (tuna->id) {
1102 case ETHTOOL_PHY_DOWNSHIFT:
1103 return m88e1011_set_downshift(phydev, *(const u8 *)data);
1104 default:
1105 return -EOPNOTSUPP;
1106 }
1107 }
1108
m88e1112_config_init(struct phy_device * phydev)1109 static int m88e1112_config_init(struct phy_device *phydev)
1110 {
1111 int err;
1112
1113 err = m88e1011_set_downshift(phydev, 3);
1114 if (err < 0)
1115 return err;
1116
1117 return m88e1111_config_init(phydev);
1118 }
1119
m88e1111gbe_config_init(struct phy_device * phydev)1120 static int m88e1111gbe_config_init(struct phy_device *phydev)
1121 {
1122 int err;
1123
1124 err = m88e1111_set_downshift(phydev, 3);
1125 if (err < 0)
1126 return err;
1127
1128 return m88e1111_config_init(phydev);
1129 }
1130
marvell_1011gbe_config_init(struct phy_device * phydev)1131 static int marvell_1011gbe_config_init(struct phy_device *phydev)
1132 {
1133 int err;
1134
1135 err = m88e1011_set_downshift(phydev, 3);
1136 if (err < 0)
1137 return err;
1138
1139 return marvell_config_init(phydev);
1140 }
m88e1116r_config_init(struct phy_device * phydev)1141 static int m88e1116r_config_init(struct phy_device *phydev)
1142 {
1143 int err;
1144
1145 err = genphy_soft_reset(phydev);
1146 if (err < 0)
1147 return err;
1148
1149 msleep(500);
1150
1151 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1152 if (err < 0)
1153 return err;
1154
1155 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
1156 if (err < 0)
1157 return err;
1158
1159 err = m88e1011_set_downshift(phydev, 8);
1160 if (err < 0)
1161 return err;
1162
1163 if (phy_interface_is_rgmii(phydev)) {
1164 err = m88e1121_config_aneg_rgmii_delays(phydev);
1165 if (err < 0)
1166 return err;
1167 }
1168
1169 err = genphy_soft_reset(phydev);
1170 if (err < 0)
1171 return err;
1172
1173 return marvell_config_init(phydev);
1174 }
1175
m88e1318_config_init(struct phy_device * phydev)1176 static int m88e1318_config_init(struct phy_device *phydev)
1177 {
1178 if (phy_interrupt_is_valid(phydev)) {
1179 int err = phy_modify_paged(
1180 phydev, MII_MARVELL_LED_PAGE,
1181 MII_88E1318S_PHY_LED_TCR,
1182 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1183 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1184 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1185 if (err < 0)
1186 return err;
1187 }
1188
1189 return marvell_config_init(phydev);
1190 }
1191
m88e1510_config_init(struct phy_device * phydev)1192 static int m88e1510_config_init(struct phy_device *phydev)
1193 {
1194 static const struct {
1195 u16 reg17, reg16;
1196 } errata_vals[] = {
1197 { 0x214b, 0x2144 },
1198 { 0x0c28, 0x2146 },
1199 { 0xb233, 0x214d },
1200 { 0xcc0c, 0x2159 },
1201 };
1202 int err;
1203 int i;
1204
1205 /* As per Marvell Release Notes - Alaska 88E1510/88E1518/88E1512/
1206 * 88E1514 Rev A0, Errata Section 5.1:
1207 * If EEE is intended to be used, the following register writes
1208 * must be done once after every hardware reset.
1209 */
1210 err = marvell_set_page(phydev, 0x00FF);
1211 if (err < 0)
1212 return err;
1213
1214 for (i = 0; i < ARRAY_SIZE(errata_vals); ++i) {
1215 err = phy_write(phydev, 17, errata_vals[i].reg17);
1216 if (err)
1217 return err;
1218 err = phy_write(phydev, 16, errata_vals[i].reg16);
1219 if (err)
1220 return err;
1221 }
1222
1223 err = marvell_set_page(phydev, 0x00FB);
1224 if (err < 0)
1225 return err;
1226 err = phy_write(phydev, 07, 0xC00D);
1227 if (err < 0)
1228 return err;
1229 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1230 if (err < 0)
1231 return err;
1232
1233 /* SGMII-to-Copper mode initialization */
1234 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1235 /* Select page 18 */
1236 err = marvell_set_page(phydev, 18);
1237 if (err < 0)
1238 return err;
1239
1240 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
1241 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
1242 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
1243 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
1244 if (err < 0)
1245 return err;
1246
1247 /* PHY reset is necessary after changing MODE[2:0] */
1248 err = phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
1249 MII_88E1510_GEN_CTRL_REG_1_RESET);
1250 if (err < 0)
1251 return err;
1252
1253 /* Reset page selection */
1254 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1255 if (err < 0)
1256 return err;
1257 }
1258 err = m88e1011_set_downshift(phydev, 3);
1259 if (err < 0)
1260 return err;
1261
1262 return m88e1318_config_init(phydev);
1263 }
1264
m88e1118_config_aneg(struct phy_device * phydev)1265 static int m88e1118_config_aneg(struct phy_device *phydev)
1266 {
1267 int err;
1268
1269 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
1270 if (err < 0)
1271 return err;
1272
1273 err = genphy_config_aneg(phydev);
1274 if (err < 0)
1275 return err;
1276
1277 return genphy_soft_reset(phydev);
1278 }
1279
m88e1118_config_init(struct phy_device * phydev)1280 static int m88e1118_config_init(struct phy_device *phydev)
1281 {
1282 u16 leds;
1283 int err;
1284
1285 /* Enable 1000 Mbit */
1286 err = phy_write_paged(phydev, MII_MARVELL_MSCR_PAGE,
1287 MII_88E1121_PHY_MSCR_REG, 0x1070);
1288 if (err < 0)
1289 return err;
1290
1291 if (phy_interface_is_rgmii(phydev)) {
1292 err = m88e1121_config_aneg_rgmii_delays(phydev);
1293 if (err < 0)
1294 return err;
1295 }
1296
1297 /* Adjust LED Control */
1298 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
1299 leds = 0x1100;
1300 else
1301 leds = 0x021e;
1302
1303 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, 0x10, leds);
1304 if (err < 0)
1305 return err;
1306
1307 err = marvell_of_reg_init(phydev);
1308 if (err < 0)
1309 return err;
1310
1311 /* Reset page register */
1312 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1313 if (err < 0)
1314 return err;
1315
1316 return genphy_soft_reset(phydev);
1317 }
1318
m88e1149_config_init(struct phy_device * phydev)1319 static int m88e1149_config_init(struct phy_device *phydev)
1320 {
1321 int err;
1322
1323 /* Change address */
1324 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
1325 if (err < 0)
1326 return err;
1327
1328 /* Enable 1000 Mbit */
1329 err = phy_write(phydev, 0x15, 0x1048);
1330 if (err < 0)
1331 return err;
1332
1333 err = marvell_of_reg_init(phydev);
1334 if (err < 0)
1335 return err;
1336
1337 /* Reset address */
1338 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1339 if (err < 0)
1340 return err;
1341
1342 return genphy_soft_reset(phydev);
1343 }
1344
m88e1145_config_init_rgmii(struct phy_device * phydev)1345 static int m88e1145_config_init_rgmii(struct phy_device *phydev)
1346 {
1347 int err;
1348
1349 err = m88e1111_config_init_rgmii_delays(phydev);
1350 if (err < 0)
1351 return err;
1352
1353 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
1354 err = phy_write(phydev, 0x1d, 0x0012);
1355 if (err < 0)
1356 return err;
1357
1358 err = phy_modify(phydev, 0x1e, 0x0fc0,
1359 2 << 9 | /* 36 ohm */
1360 2 << 6); /* 39 ohm */
1361 if (err < 0)
1362 return err;
1363
1364 err = phy_write(phydev, 0x1d, 0x3);
1365 if (err < 0)
1366 return err;
1367
1368 err = phy_write(phydev, 0x1e, 0x8000);
1369 }
1370 return err;
1371 }
1372
m88e1145_config_init_sgmii(struct phy_device * phydev)1373 static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1374 {
1375 return m88e1111_config_init_hwcfg_mode(
1376 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1377 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
1378 }
1379
m88e1145_config_init(struct phy_device * phydev)1380 static int m88e1145_config_init(struct phy_device *phydev)
1381 {
1382 int err;
1383
1384 /* Take care of errata E0 & E1 */
1385 err = phy_write(phydev, 0x1d, 0x001b);
1386 if (err < 0)
1387 return err;
1388
1389 err = phy_write(phydev, 0x1e, 0x418f);
1390 if (err < 0)
1391 return err;
1392
1393 err = phy_write(phydev, 0x1d, 0x0016);
1394 if (err < 0)
1395 return err;
1396
1397 err = phy_write(phydev, 0x1e, 0xa2da);
1398 if (err < 0)
1399 return err;
1400
1401 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1402 err = m88e1145_config_init_rgmii(phydev);
1403 if (err < 0)
1404 return err;
1405 }
1406
1407 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1408 err = m88e1145_config_init_sgmii(phydev);
1409 if (err < 0)
1410 return err;
1411 }
1412 err = m88e1111_set_downshift(phydev, 3);
1413 if (err < 0)
1414 return err;
1415
1416 err = marvell_of_reg_init(phydev);
1417 if (err < 0)
1418 return err;
1419
1420 return 0;
1421 }
1422
m88e1540_get_fld(struct phy_device * phydev,u8 * msecs)1423 static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs)
1424 {
1425 int val;
1426
1427 val = phy_read(phydev, MII_88E1540_COPPER_CTRL3);
1428 if (val < 0)
1429 return val;
1430
1431 if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) {
1432 *msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF;
1433 return 0;
1434 }
1435
1436 val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1437
1438 switch (val) {
1439 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS:
1440 *msecs = 0;
1441 break;
1442 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS:
1443 *msecs = 10;
1444 break;
1445 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS:
1446 *msecs = 20;
1447 break;
1448 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS:
1449 *msecs = 40;
1450 break;
1451 default:
1452 return -EINVAL;
1453 }
1454
1455 return 0;
1456 }
1457
m88e1540_set_fld(struct phy_device * phydev,const u8 * msecs)1458 static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs)
1459 {
1460 struct ethtool_eee eee;
1461 int val, ret;
1462
1463 if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF)
1464 return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3,
1465 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1466
1467 /* According to the Marvell data sheet EEE must be disabled for
1468 * Fast Link Down detection to work properly
1469 */
1470 ret = phy_ethtool_get_eee(phydev, &eee);
1471 if (!ret && eee.eee_enabled) {
1472 phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n");
1473 return -EBUSY;
1474 }
1475
1476 if (*msecs <= 5)
1477 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS;
1478 else if (*msecs <= 15)
1479 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS;
1480 else if (*msecs <= 30)
1481 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS;
1482 else
1483 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS;
1484
1485 val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1486
1487 ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3,
1488 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1489 if (ret)
1490 return ret;
1491
1492 return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3,
1493 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1494 }
1495
m88e1540_get_tunable(struct phy_device * phydev,struct ethtool_tunable * tuna,void * data)1496 static int m88e1540_get_tunable(struct phy_device *phydev,
1497 struct ethtool_tunable *tuna, void *data)
1498 {
1499 switch (tuna->id) {
1500 case ETHTOOL_PHY_FAST_LINK_DOWN:
1501 return m88e1540_get_fld(phydev, data);
1502 case ETHTOOL_PHY_DOWNSHIFT:
1503 return m88e1011_get_downshift(phydev, data);
1504 default:
1505 return -EOPNOTSUPP;
1506 }
1507 }
1508
m88e1540_set_tunable(struct phy_device * phydev,struct ethtool_tunable * tuna,const void * data)1509 static int m88e1540_set_tunable(struct phy_device *phydev,
1510 struct ethtool_tunable *tuna, const void *data)
1511 {
1512 switch (tuna->id) {
1513 case ETHTOOL_PHY_FAST_LINK_DOWN:
1514 return m88e1540_set_fld(phydev, data);
1515 case ETHTOOL_PHY_DOWNSHIFT:
1516 return m88e1011_set_downshift(phydev, *(const u8 *)data);
1517 default:
1518 return -EOPNOTSUPP;
1519 }
1520 }
1521
1522 /* The VOD can be out of specification on link up. Poke an
1523 * undocumented register, in an undocumented page, with a magic value
1524 * to fix this.
1525 */
m88e6390_errata(struct phy_device * phydev)1526 static int m88e6390_errata(struct phy_device *phydev)
1527 {
1528 int err;
1529
1530 err = phy_write(phydev, MII_BMCR,
1531 BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
1532 if (err)
1533 return err;
1534
1535 usleep_range(300, 400);
1536
1537 err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
1538 if (err)
1539 return err;
1540
1541 return genphy_soft_reset(phydev);
1542 }
1543
m88e6390_config_aneg(struct phy_device * phydev)1544 static int m88e6390_config_aneg(struct phy_device *phydev)
1545 {
1546 int err;
1547
1548 err = m88e6390_errata(phydev);
1549 if (err)
1550 return err;
1551
1552 return m88e1510_config_aneg(phydev);
1553 }
1554
1555 /**
1556 * fiber_lpa_mod_linkmode_lpa_t
1557 * @advertising: the linkmode advertisement settings
1558 * @lpa: value of the MII_LPA register for fiber link
1559 *
1560 * A small helper function that translates MII_LPA bits to linkmode LP
1561 * advertisement settings. Other bits in advertising are left
1562 * unchanged.
1563 */
fiber_lpa_mod_linkmode_lpa_t(unsigned long * advertising,u32 lpa)1564 static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
1565 {
1566 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
1567 advertising, lpa & LPA_1000XHALF);
1568
1569 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1570 advertising, lpa & LPA_1000XFULL);
1571 }
1572
marvell_read_status_page_an(struct phy_device * phydev,int fiber,int status)1573 static int marvell_read_status_page_an(struct phy_device *phydev,
1574 int fiber, int status)
1575 {
1576 int lpa;
1577 int err;
1578
1579 if (!(status & MII_M1011_PHY_STATUS_RESOLVED)) {
1580 phydev->link = 0;
1581 return 0;
1582 }
1583
1584 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1585 phydev->duplex = DUPLEX_FULL;
1586 else
1587 phydev->duplex = DUPLEX_HALF;
1588
1589 switch (status & MII_M1011_PHY_STATUS_SPD_MASK) {
1590 case MII_M1011_PHY_STATUS_1000:
1591 phydev->speed = SPEED_1000;
1592 break;
1593
1594 case MII_M1011_PHY_STATUS_100:
1595 phydev->speed = SPEED_100;
1596 break;
1597
1598 default:
1599 phydev->speed = SPEED_10;
1600 break;
1601 }
1602
1603 if (!fiber) {
1604 err = genphy_read_lpa(phydev);
1605 if (err < 0)
1606 return err;
1607
1608 phy_resolve_aneg_pause(phydev);
1609 } else {
1610 lpa = phy_read(phydev, MII_LPA);
1611 if (lpa < 0)
1612 return lpa;
1613
1614 /* The fiber link is only 1000M capable */
1615 fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
1616
1617 if (phydev->duplex == DUPLEX_FULL) {
1618 if (!(lpa & LPA_PAUSE_FIBER)) {
1619 phydev->pause = 0;
1620 phydev->asym_pause = 0;
1621 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1622 phydev->pause = 1;
1623 phydev->asym_pause = 1;
1624 } else {
1625 phydev->pause = 1;
1626 phydev->asym_pause = 0;
1627 }
1628 }
1629 }
1630
1631 return 0;
1632 }
1633
1634 /* marvell_read_status_page
1635 *
1636 * Description:
1637 * Check the link, then figure out the current state
1638 * by comparing what we advertise with what the link partner
1639 * advertises. Start by checking the gigabit possibilities,
1640 * then move on to 10/100.
1641 */
marvell_read_status_page(struct phy_device * phydev,int page)1642 static int marvell_read_status_page(struct phy_device *phydev, int page)
1643 {
1644 int status;
1645 int fiber;
1646 int err;
1647
1648 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1649 if (status < 0)
1650 return status;
1651
1652 /* Use the generic register for copper link status,
1653 * and the PHY status register for fiber link status.
1654 */
1655 if (page == MII_MARVELL_FIBER_PAGE) {
1656 phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK);
1657 } else {
1658 err = genphy_update_link(phydev);
1659 if (err)
1660 return err;
1661 }
1662
1663 if (page == MII_MARVELL_FIBER_PAGE)
1664 fiber = 1;
1665 else
1666 fiber = 0;
1667
1668 linkmode_zero(phydev->lp_advertising);
1669 phydev->pause = 0;
1670 phydev->asym_pause = 0;
1671 phydev->speed = SPEED_UNKNOWN;
1672 phydev->duplex = DUPLEX_UNKNOWN;
1673 phydev->port = fiber ? PORT_FIBRE : PORT_TP;
1674
1675 if (phydev->autoneg == AUTONEG_ENABLE)
1676 err = marvell_read_status_page_an(phydev, fiber, status);
1677 else
1678 err = genphy_read_status_fixed(phydev);
1679
1680 return err;
1681 }
1682
1683 /* marvell_read_status
1684 *
1685 * Some Marvell's phys have two modes: fiber and copper.
1686 * Both need status checked.
1687 * Description:
1688 * First, check the fiber link and status.
1689 * If the fiber link is down, check the copper link and status which
1690 * will be the default value if both link are down.
1691 */
marvell_read_status(struct phy_device * phydev)1692 static int marvell_read_status(struct phy_device *phydev)
1693 {
1694 int err;
1695
1696 /* Check the fiber mode first */
1697 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1698 phydev->supported) &&
1699 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1700 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1701 if (err < 0)
1702 goto error;
1703
1704 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1705 if (err < 0)
1706 goto error;
1707
1708 /* If the fiber link is up, it is the selected and
1709 * used link. In this case, we need to stay in the
1710 * fiber page. Please to be careful about that, avoid
1711 * to restore Copper page in other functions which
1712 * could break the behaviour for some fiber phy like
1713 * 88E1512.
1714 */
1715 if (phydev->link)
1716 return 0;
1717
1718 /* If fiber link is down, check and save copper mode state */
1719 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1720 if (err < 0)
1721 goto error;
1722 }
1723
1724 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1725
1726 error:
1727 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1728 return err;
1729 }
1730
1731 /* marvell_suspend
1732 *
1733 * Some Marvell's phys have two modes: fiber and copper.
1734 * Both need to be suspended
1735 */
marvell_suspend(struct phy_device * phydev)1736 static int marvell_suspend(struct phy_device *phydev)
1737 {
1738 int err;
1739
1740 /* Suspend the fiber mode first */
1741 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1742 phydev->supported)) {
1743 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1744 if (err < 0)
1745 goto error;
1746
1747 /* With the page set, use the generic suspend */
1748 err = genphy_suspend(phydev);
1749 if (err < 0)
1750 goto error;
1751
1752 /* Then, the copper link */
1753 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1754 if (err < 0)
1755 goto error;
1756 }
1757
1758 /* With the page set, use the generic suspend */
1759 return genphy_suspend(phydev);
1760
1761 error:
1762 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1763 return err;
1764 }
1765
1766 /* marvell_resume
1767 *
1768 * Some Marvell's phys have two modes: fiber and copper.
1769 * Both need to be resumed
1770 */
marvell_resume(struct phy_device * phydev)1771 static int marvell_resume(struct phy_device *phydev)
1772 {
1773 int err;
1774
1775 /* Resume the fiber mode first */
1776 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1777 phydev->supported)) {
1778 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1779 if (err < 0)
1780 goto error;
1781
1782 /* With the page set, use the generic resume */
1783 err = genphy_resume(phydev);
1784 if (err < 0)
1785 goto error;
1786
1787 /* Then, the copper link */
1788 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1789 if (err < 0)
1790 goto error;
1791 }
1792
1793 /* With the page set, use the generic resume */
1794 return genphy_resume(phydev);
1795
1796 error:
1797 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1798 return err;
1799 }
1800
marvell_aneg_done(struct phy_device * phydev)1801 static int marvell_aneg_done(struct phy_device *phydev)
1802 {
1803 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1804
1805 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1806 }
1807
m88e1318_get_wol(struct phy_device * phydev,struct ethtool_wolinfo * wol)1808 static void m88e1318_get_wol(struct phy_device *phydev,
1809 struct ethtool_wolinfo *wol)
1810 {
1811 int ret;
1812
1813 wol->supported = WAKE_MAGIC | WAKE_PHY;
1814 wol->wolopts = 0;
1815
1816 ret = phy_read_paged(phydev, MII_MARVELL_WOL_PAGE,
1817 MII_88E1318S_PHY_WOL_CTRL);
1818 if (ret < 0)
1819 return;
1820
1821 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1822 wol->wolopts |= WAKE_MAGIC;
1823
1824 if (ret & MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE)
1825 wol->wolopts |= WAKE_PHY;
1826 }
1827
m88e1318_set_wol(struct phy_device * phydev,struct ethtool_wolinfo * wol)1828 static int m88e1318_set_wol(struct phy_device *phydev,
1829 struct ethtool_wolinfo *wol)
1830 {
1831 int err = 0, oldpage;
1832
1833 oldpage = phy_save_page(phydev);
1834 if (oldpage < 0)
1835 goto error;
1836
1837 if (wol->wolopts & (WAKE_MAGIC | WAKE_PHY)) {
1838 /* Explicitly switch to page 0x00, just to be sure */
1839 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
1840 if (err < 0)
1841 goto error;
1842
1843 /* If WOL event happened once, the LED[2] interrupt pin
1844 * will not be cleared unless we reading the interrupt status
1845 * register. If interrupts are in use, the normal interrupt
1846 * handling will clear the WOL event. Clear the WOL event
1847 * before enabling it if !phy_interrupt_is_valid()
1848 */
1849 if (!phy_interrupt_is_valid(phydev))
1850 __phy_read(phydev, MII_M1011_IEVENT);
1851
1852 /* Enable the WOL interrupt */
1853 err = __phy_set_bits(phydev, MII_88E1318S_PHY_CSIER,
1854 MII_88E1318S_PHY_CSIER_WOL_EIE);
1855 if (err < 0)
1856 goto error;
1857
1858 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
1859 if (err < 0)
1860 goto error;
1861
1862 /* Setup LED[2] as interrupt pin (active low) */
1863 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
1864 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1865 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1866 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1867 if (err < 0)
1868 goto error;
1869 }
1870
1871 if (wol->wolopts & WAKE_MAGIC) {
1872 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1873 if (err < 0)
1874 goto error;
1875
1876 /* Store the device address for the magic packet */
1877 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1878 ((phydev->attached_dev->dev_addr[5] << 8) |
1879 phydev->attached_dev->dev_addr[4]));
1880 if (err < 0)
1881 goto error;
1882 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1883 ((phydev->attached_dev->dev_addr[3] << 8) |
1884 phydev->attached_dev->dev_addr[2]));
1885 if (err < 0)
1886 goto error;
1887 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1888 ((phydev->attached_dev->dev_addr[1] << 8) |
1889 phydev->attached_dev->dev_addr[0]));
1890 if (err < 0)
1891 goto error;
1892
1893 /* Clear WOL status and enable magic packet matching */
1894 err = __phy_set_bits(phydev, MII_88E1318S_PHY_WOL_CTRL,
1895 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1896 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
1897 if (err < 0)
1898 goto error;
1899 } else {
1900 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1901 if (err < 0)
1902 goto error;
1903
1904 /* Clear WOL status and disable magic packet matching */
1905 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1906 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
1907 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1908 if (err < 0)
1909 goto error;
1910 }
1911
1912 if (wol->wolopts & WAKE_PHY) {
1913 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1914 if (err < 0)
1915 goto error;
1916
1917 /* Clear WOL status and enable link up event */
1918 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
1919 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1920 MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE);
1921 if (err < 0)
1922 goto error;
1923 } else {
1924 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1925 if (err < 0)
1926 goto error;
1927
1928 /* Clear WOL status and disable link up event */
1929 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1930 MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE,
1931 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1932 if (err < 0)
1933 goto error;
1934 }
1935
1936 error:
1937 return phy_restore_page(phydev, oldpage, err);
1938 }
1939
marvell_get_sset_count(struct phy_device * phydev)1940 static int marvell_get_sset_count(struct phy_device *phydev)
1941 {
1942 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1943 phydev->supported))
1944 return ARRAY_SIZE(marvell_hw_stats);
1945 else
1946 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1947 }
1948
marvell_get_strings(struct phy_device * phydev,u8 * data)1949 static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1950 {
1951 int count = marvell_get_sset_count(phydev);
1952 int i;
1953
1954 for (i = 0; i < count; i++) {
1955 strscpy(data + i * ETH_GSTRING_LEN,
1956 marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1957 }
1958 }
1959
marvell_get_stat(struct phy_device * phydev,int i)1960 static u64 marvell_get_stat(struct phy_device *phydev, int i)
1961 {
1962 struct marvell_hw_stat stat = marvell_hw_stats[i];
1963 struct marvell_priv *priv = phydev->priv;
1964 int val;
1965 u64 ret;
1966
1967 val = phy_read_paged(phydev, stat.page, stat.reg);
1968 if (val < 0) {
1969 ret = U64_MAX;
1970 } else {
1971 val = val & ((1 << stat.bits) - 1);
1972 priv->stats[i] += val;
1973 ret = priv->stats[i];
1974 }
1975
1976 return ret;
1977 }
1978
marvell_get_stats(struct phy_device * phydev,struct ethtool_stats * stats,u64 * data)1979 static void marvell_get_stats(struct phy_device *phydev,
1980 struct ethtool_stats *stats, u64 *data)
1981 {
1982 int count = marvell_get_sset_count(phydev);
1983 int i;
1984
1985 for (i = 0; i < count; i++)
1986 data[i] = marvell_get_stat(phydev, i);
1987 }
1988
m88e1510_loopback(struct phy_device * phydev,bool enable)1989 static int m88e1510_loopback(struct phy_device *phydev, bool enable)
1990 {
1991 int err;
1992
1993 if (enable) {
1994 u16 bmcr_ctl, mscr2_ctl = 0;
1995
1996 bmcr_ctl = mii_bmcr_encode_fixed(phydev->speed, phydev->duplex);
1997
1998 err = phy_write(phydev, MII_BMCR, bmcr_ctl);
1999 if (err < 0)
2000 return err;
2001
2002 if (phydev->speed == SPEED_1000)
2003 mscr2_ctl = BMCR_SPEED1000;
2004 else if (phydev->speed == SPEED_100)
2005 mscr2_ctl = BMCR_SPEED100;
2006
2007 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
2008 MII_88E1510_MSCR_2, BMCR_SPEED1000 |
2009 BMCR_SPEED100, mscr2_ctl);
2010 if (err < 0)
2011 return err;
2012
2013 /* Need soft reset to have speed configuration takes effect */
2014 err = genphy_soft_reset(phydev);
2015 if (err < 0)
2016 return err;
2017
2018 err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK,
2019 BMCR_LOOPBACK);
2020
2021 if (!err) {
2022 /* It takes some time for PHY device to switch
2023 * into/out-of loopback mode.
2024 */
2025 msleep(1000);
2026 }
2027 return err;
2028 } else {
2029 err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK, 0);
2030 if (err < 0)
2031 return err;
2032
2033 return phy_config_aneg(phydev);
2034 }
2035 }
2036
marvell_vct5_wait_complete(struct phy_device * phydev)2037 static int marvell_vct5_wait_complete(struct phy_device *phydev)
2038 {
2039 int i;
2040 int val;
2041
2042 for (i = 0; i < 32; i++) {
2043 val = __phy_read(phydev, MII_VCT5_CTRL);
2044 if (val < 0)
2045 return val;
2046
2047 if (val & MII_VCT5_CTRL_COMPLETE)
2048 return 0;
2049 }
2050
2051 phydev_err(phydev, "Timeout while waiting for cable test to finish\n");
2052 return -ETIMEDOUT;
2053 }
2054
marvell_vct5_amplitude(struct phy_device * phydev,int pair)2055 static int marvell_vct5_amplitude(struct phy_device *phydev, int pair)
2056 {
2057 int amplitude;
2058 int val;
2059 int reg;
2060
2061 reg = MII_VCT5_TX_RX_MDI0_COUPLING + pair;
2062 val = __phy_read(phydev, reg);
2063
2064 if (val < 0)
2065 return 0;
2066
2067 amplitude = (val & MII_VCT5_TX_RX_AMPLITUDE_MASK) >>
2068 MII_VCT5_TX_RX_AMPLITUDE_SHIFT;
2069
2070 if (!(val & MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION))
2071 amplitude = -amplitude;
2072
2073 return 1000 * amplitude / 128;
2074 }
2075
marvell_vct5_distance2cm(int distance)2076 static u32 marvell_vct5_distance2cm(int distance)
2077 {
2078 return distance * 805 / 10;
2079 }
2080
marvell_vct5_cm2distance(int cm)2081 static u32 marvell_vct5_cm2distance(int cm)
2082 {
2083 return cm * 10 / 805;
2084 }
2085
marvell_vct5_amplitude_distance(struct phy_device * phydev,int distance,int pair)2086 static int marvell_vct5_amplitude_distance(struct phy_device *phydev,
2087 int distance, int pair)
2088 {
2089 u16 reg;
2090 int err;
2091 int mV;
2092 int i;
2093
2094 err = __phy_write(phydev, MII_VCT5_SAMPLE_POINT_DISTANCE,
2095 distance);
2096 if (err)
2097 return err;
2098
2099 reg = MII_VCT5_CTRL_ENABLE |
2100 MII_VCT5_CTRL_TX_SAME_CHANNEL |
2101 MII_VCT5_CTRL_SAMPLES_DEFAULT |
2102 MII_VCT5_CTRL_SAMPLE_POINT |
2103 MII_VCT5_CTRL_PEEK_HYST_DEFAULT;
2104 err = __phy_write(phydev, MII_VCT5_CTRL, reg);
2105 if (err)
2106 return err;
2107
2108 err = marvell_vct5_wait_complete(phydev);
2109 if (err)
2110 return err;
2111
2112 for (i = 0; i < 4; i++) {
2113 if (pair != PHY_PAIR_ALL && i != pair)
2114 continue;
2115
2116 mV = marvell_vct5_amplitude(phydev, i);
2117 ethnl_cable_test_amplitude(phydev, i, mV);
2118 }
2119
2120 return 0;
2121 }
2122
marvell_vct5_amplitude_graph(struct phy_device * phydev)2123 static int marvell_vct5_amplitude_graph(struct phy_device *phydev)
2124 {
2125 struct marvell_priv *priv = phydev->priv;
2126 int distance;
2127 u16 width;
2128 int page;
2129 int err;
2130 u16 reg;
2131
2132 if (priv->first <= TDR_SHORT_CABLE_LENGTH)
2133 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS;
2134 else
2135 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
2136
2137 reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
2138 MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
2139 MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
2140
2141 err = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2142 MII_VCT5_TX_PULSE_CTRL, reg);
2143 if (err)
2144 return err;
2145
2146 /* Reading the TDR data is very MDIO heavy. We need to optimize
2147 * access to keep the time to a minimum. So lock the bus once,
2148 * and don't release it until complete. We can then avoid having
2149 * to change the page for every access, greatly speeding things
2150 * up.
2151 */
2152 page = phy_select_page(phydev, MII_MARVELL_VCT5_PAGE);
2153 if (page < 0)
2154 goto restore_page;
2155
2156 for (distance = priv->first;
2157 distance <= priv->last;
2158 distance += priv->step) {
2159 err = marvell_vct5_amplitude_distance(phydev, distance,
2160 priv->pair);
2161 if (err)
2162 goto restore_page;
2163
2164 if (distance > TDR_SHORT_CABLE_LENGTH &&
2165 width == MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS) {
2166 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
2167 reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
2168 MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
2169 MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
2170 err = __phy_write(phydev, MII_VCT5_TX_PULSE_CTRL, reg);
2171 if (err)
2172 goto restore_page;
2173 }
2174 }
2175
2176 restore_page:
2177 return phy_restore_page(phydev, page, err);
2178 }
2179
marvell_cable_test_start_common(struct phy_device * phydev)2180 static int marvell_cable_test_start_common(struct phy_device *phydev)
2181 {
2182 int bmcr, bmsr, ret;
2183
2184 /* If auto-negotiation is enabled, but not complete, the cable
2185 * test never completes. So disable auto-neg.
2186 */
2187 bmcr = phy_read(phydev, MII_BMCR);
2188 if (bmcr < 0)
2189 return bmcr;
2190
2191 bmsr = phy_read(phydev, MII_BMSR);
2192
2193 if (bmsr < 0)
2194 return bmsr;
2195
2196 if (bmcr & BMCR_ANENABLE) {
2197 ret = phy_clear_bits(phydev, MII_BMCR, BMCR_ANENABLE);
2198 if (ret < 0)
2199 return ret;
2200 ret = genphy_soft_reset(phydev);
2201 if (ret < 0)
2202 return ret;
2203 }
2204
2205 /* If the link is up, allow it some time to go down */
2206 if (bmsr & BMSR_LSTATUS)
2207 msleep(1500);
2208
2209 return 0;
2210 }
2211
marvell_vct7_cable_test_start(struct phy_device * phydev)2212 static int marvell_vct7_cable_test_start(struct phy_device *phydev)
2213 {
2214 struct marvell_priv *priv = phydev->priv;
2215 int ret;
2216
2217 ret = marvell_cable_test_start_common(phydev);
2218 if (ret)
2219 return ret;
2220
2221 priv->cable_test_tdr = false;
2222
2223 /* Reset the VCT5 API control to defaults, otherwise
2224 * VCT7 does not work correctly.
2225 */
2226 ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2227 MII_VCT5_CTRL,
2228 MII_VCT5_CTRL_TX_SAME_CHANNEL |
2229 MII_VCT5_CTRL_SAMPLES_DEFAULT |
2230 MII_VCT5_CTRL_MODE_MAXIMUM_PEEK |
2231 MII_VCT5_CTRL_PEEK_HYST_DEFAULT);
2232 if (ret)
2233 return ret;
2234
2235 ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
2236 MII_VCT5_SAMPLE_POINT_DISTANCE, 0);
2237 if (ret)
2238 return ret;
2239
2240 return phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
2241 MII_VCT7_CTRL,
2242 MII_VCT7_CTRL_RUN_NOW |
2243 MII_VCT7_CTRL_CENTIMETERS);
2244 }
2245
marvell_vct5_cable_test_tdr_start(struct phy_device * phydev,const struct phy_tdr_config * cfg)2246 static int marvell_vct5_cable_test_tdr_start(struct phy_device *phydev,
2247 const struct phy_tdr_config *cfg)
2248 {
2249 struct marvell_priv *priv = phydev->priv;
2250 int ret;
2251
2252 priv->cable_test_tdr = true;
2253 priv->first = marvell_vct5_cm2distance(cfg->first);
2254 priv->last = marvell_vct5_cm2distance(cfg->last);
2255 priv->step = marvell_vct5_cm2distance(cfg->step);
2256 priv->pair = cfg->pair;
2257
2258 if (priv->first > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
2259 return -EINVAL;
2260
2261 if (priv->last > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
2262 return -EINVAL;
2263
2264 /* Disable VCT7 */
2265 ret = phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
2266 MII_VCT7_CTRL, 0);
2267 if (ret)
2268 return ret;
2269
2270 ret = marvell_cable_test_start_common(phydev);
2271 if (ret)
2272 return ret;
2273
2274 ret = ethnl_cable_test_pulse(phydev, 1000);
2275 if (ret)
2276 return ret;
2277
2278 return ethnl_cable_test_step(phydev,
2279 marvell_vct5_distance2cm(priv->first),
2280 marvell_vct5_distance2cm(priv->last),
2281 marvell_vct5_distance2cm(priv->step));
2282 }
2283
marvell_vct7_distance_to_length(int distance,bool meter)2284 static int marvell_vct7_distance_to_length(int distance, bool meter)
2285 {
2286 if (meter)
2287 distance *= 100;
2288
2289 return distance;
2290 }
2291
marvell_vct7_distance_valid(int result)2292 static bool marvell_vct7_distance_valid(int result)
2293 {
2294 switch (result) {
2295 case MII_VCT7_RESULTS_OPEN:
2296 case MII_VCT7_RESULTS_SAME_SHORT:
2297 case MII_VCT7_RESULTS_CROSS_SHORT:
2298 return true;
2299 }
2300 return false;
2301 }
2302
marvell_vct7_report_length(struct phy_device * phydev,int pair,bool meter)2303 static int marvell_vct7_report_length(struct phy_device *phydev,
2304 int pair, bool meter)
2305 {
2306 int length;
2307 int ret;
2308
2309 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2310 MII_VCT7_PAIR_0_DISTANCE + pair);
2311 if (ret < 0)
2312 return ret;
2313
2314 length = marvell_vct7_distance_to_length(ret, meter);
2315
2316 ethnl_cable_test_fault_length(phydev, pair, length);
2317
2318 return 0;
2319 }
2320
marvell_vct7_cable_test_report_trans(int result)2321 static int marvell_vct7_cable_test_report_trans(int result)
2322 {
2323 switch (result) {
2324 case MII_VCT7_RESULTS_OK:
2325 return ETHTOOL_A_CABLE_RESULT_CODE_OK;
2326 case MII_VCT7_RESULTS_OPEN:
2327 return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
2328 case MII_VCT7_RESULTS_SAME_SHORT:
2329 return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
2330 case MII_VCT7_RESULTS_CROSS_SHORT:
2331 return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT;
2332 default:
2333 return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
2334 }
2335 }
2336
marvell_vct7_cable_test_report(struct phy_device * phydev)2337 static int marvell_vct7_cable_test_report(struct phy_device *phydev)
2338 {
2339 int pair0, pair1, pair2, pair3;
2340 bool meter;
2341 int ret;
2342
2343 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2344 MII_VCT7_RESULTS);
2345 if (ret < 0)
2346 return ret;
2347
2348 pair3 = (ret & MII_VCT7_RESULTS_PAIR3_MASK) >>
2349 MII_VCT7_RESULTS_PAIR3_SHIFT;
2350 pair2 = (ret & MII_VCT7_RESULTS_PAIR2_MASK) >>
2351 MII_VCT7_RESULTS_PAIR2_SHIFT;
2352 pair1 = (ret & MII_VCT7_RESULTS_PAIR1_MASK) >>
2353 MII_VCT7_RESULTS_PAIR1_SHIFT;
2354 pair0 = (ret & MII_VCT7_RESULTS_PAIR0_MASK) >>
2355 MII_VCT7_RESULTS_PAIR0_SHIFT;
2356
2357 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A,
2358 marvell_vct7_cable_test_report_trans(pair0));
2359 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B,
2360 marvell_vct7_cable_test_report_trans(pair1));
2361 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_C,
2362 marvell_vct7_cable_test_report_trans(pair2));
2363 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D,
2364 marvell_vct7_cable_test_report_trans(pair3));
2365
2366 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, MII_VCT7_CTRL);
2367 if (ret < 0)
2368 return ret;
2369
2370 meter = ret & MII_VCT7_CTRL_METERS;
2371
2372 if (marvell_vct7_distance_valid(pair0))
2373 marvell_vct7_report_length(phydev, 0, meter);
2374 if (marvell_vct7_distance_valid(pair1))
2375 marvell_vct7_report_length(phydev, 1, meter);
2376 if (marvell_vct7_distance_valid(pair2))
2377 marvell_vct7_report_length(phydev, 2, meter);
2378 if (marvell_vct7_distance_valid(pair3))
2379 marvell_vct7_report_length(phydev, 3, meter);
2380
2381 return 0;
2382 }
2383
marvell_vct7_cable_test_get_status(struct phy_device * phydev,bool * finished)2384 static int marvell_vct7_cable_test_get_status(struct phy_device *phydev,
2385 bool *finished)
2386 {
2387 struct marvell_priv *priv = phydev->priv;
2388 int ret;
2389
2390 if (priv->cable_test_tdr) {
2391 ret = marvell_vct5_amplitude_graph(phydev);
2392 *finished = true;
2393 return ret;
2394 }
2395
2396 *finished = false;
2397
2398 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2399 MII_VCT7_CTRL);
2400
2401 if (ret < 0)
2402 return ret;
2403
2404 if (!(ret & MII_VCT7_CTRL_IN_PROGRESS)) {
2405 *finished = true;
2406
2407 return marvell_vct7_cable_test_report(phydev);
2408 }
2409
2410 return 0;
2411 }
2412
2413 #ifdef CONFIG_HWMON
2414 struct marvell_hwmon_ops {
2415 int (*config)(struct phy_device *phydev);
2416 int (*get_temp)(struct phy_device *phydev, long *temp);
2417 int (*get_temp_critical)(struct phy_device *phydev, long *temp);
2418 int (*set_temp_critical)(struct phy_device *phydev, long temp);
2419 int (*get_temp_alarm)(struct phy_device *phydev, long *alarm);
2420 };
2421
2422 static const struct marvell_hwmon_ops *
to_marvell_hwmon_ops(const struct phy_device * phydev)2423 to_marvell_hwmon_ops(const struct phy_device *phydev)
2424 {
2425 return phydev->drv->driver_data;
2426 }
2427
m88e1121_get_temp(struct phy_device * phydev,long * temp)2428 static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
2429 {
2430 int oldpage;
2431 int ret = 0;
2432 int val;
2433
2434 *temp = 0;
2435
2436 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2437 if (oldpage < 0)
2438 goto error;
2439
2440 /* Enable temperature sensor */
2441 ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
2442 if (ret < 0)
2443 goto error;
2444
2445 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2446 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
2447 if (ret < 0)
2448 goto error;
2449
2450 /* Wait for temperature to stabilize */
2451 usleep_range(10000, 12000);
2452
2453 val = __phy_read(phydev, MII_88E1121_MISC_TEST);
2454 if (val < 0) {
2455 ret = val;
2456 goto error;
2457 }
2458
2459 /* Disable temperature sensor */
2460 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2461 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
2462 if (ret < 0)
2463 goto error;
2464
2465 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
2466
2467 error:
2468 return phy_restore_page(phydev, oldpage, ret);
2469 }
2470
m88e1510_get_temp(struct phy_device * phydev,long * temp)2471 static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
2472 {
2473 int ret;
2474
2475 *temp = 0;
2476
2477 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2478 MII_88E1510_TEMP_SENSOR);
2479 if (ret < 0)
2480 return ret;
2481
2482 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
2483
2484 return 0;
2485 }
2486
m88e1510_get_temp_critical(struct phy_device * phydev,long * temp)2487 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
2488 {
2489 int ret;
2490
2491 *temp = 0;
2492
2493 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2494 MII_88E1121_MISC_TEST);
2495 if (ret < 0)
2496 return ret;
2497
2498 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
2499 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
2500 /* convert to mC */
2501 *temp *= 1000;
2502
2503 return 0;
2504 }
2505
m88e1510_set_temp_critical(struct phy_device * phydev,long temp)2506 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
2507 {
2508 temp = temp / 1000;
2509 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
2510
2511 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2512 MII_88E1121_MISC_TEST,
2513 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
2514 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
2515 }
2516
m88e1510_get_temp_alarm(struct phy_device * phydev,long * alarm)2517 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
2518 {
2519 int ret;
2520
2521 *alarm = false;
2522
2523 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2524 MII_88E1121_MISC_TEST);
2525 if (ret < 0)
2526 return ret;
2527
2528 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
2529
2530 return 0;
2531 }
2532
m88e6390_get_temp(struct phy_device * phydev,long * temp)2533 static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
2534 {
2535 int sum = 0;
2536 int oldpage;
2537 int ret = 0;
2538 int i;
2539
2540 *temp = 0;
2541
2542 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2543 if (oldpage < 0)
2544 goto error;
2545
2546 /* Enable temperature sensor */
2547 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2548 if (ret < 0)
2549 goto error;
2550
2551 ret &= ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
2552 ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S;
2553
2554 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2555 if (ret < 0)
2556 goto error;
2557
2558 /* Wait for temperature to stabilize */
2559 usleep_range(10000, 12000);
2560
2561 /* Reading the temperature sense has an errata. You need to read
2562 * a number of times and take an average.
2563 */
2564 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
2565 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
2566 if (ret < 0)
2567 goto error;
2568 sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
2569 }
2570
2571 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
2572 *temp = (sum - 75) * 1000;
2573
2574 /* Disable temperature sensor */
2575 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2576 if (ret < 0)
2577 goto error;
2578
2579 ret = ret & ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
2580 ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE;
2581
2582 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2583
2584 error:
2585 phy_restore_page(phydev, oldpage, ret);
2586
2587 return ret;
2588 }
2589
m88e6393_get_temp(struct phy_device * phydev,long * temp)2590 static int m88e6393_get_temp(struct phy_device *phydev, long *temp)
2591 {
2592 int err;
2593
2594 err = m88e1510_get_temp(phydev, temp);
2595
2596 /* 88E1510 measures T + 25, while the PHY on 88E6393X switch
2597 * T + 75, so we have to subtract another 50
2598 */
2599 *temp -= 50000;
2600
2601 return err;
2602 }
2603
m88e6393_get_temp_critical(struct phy_device * phydev,long * temp)2604 static int m88e6393_get_temp_critical(struct phy_device *phydev, long *temp)
2605 {
2606 int ret;
2607
2608 *temp = 0;
2609
2610 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2611 MII_88E6390_TEMP_SENSOR);
2612 if (ret < 0)
2613 return ret;
2614
2615 *temp = (((ret & MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK) >>
2616 MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT) - 75) * 1000;
2617
2618 return 0;
2619 }
2620
m88e6393_set_temp_critical(struct phy_device * phydev,long temp)2621 static int m88e6393_set_temp_critical(struct phy_device *phydev, long temp)
2622 {
2623 temp = (temp / 1000) + 75;
2624
2625 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2626 MII_88E6390_TEMP_SENSOR,
2627 MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK,
2628 temp << MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT);
2629 }
2630
m88e6393_hwmon_config(struct phy_device * phydev)2631 static int m88e6393_hwmon_config(struct phy_device *phydev)
2632 {
2633 int err;
2634
2635 err = m88e6393_set_temp_critical(phydev, 100000);
2636 if (err)
2637 return err;
2638
2639 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2640 MII_88E6390_MISC_TEST,
2641 MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK |
2642 MII_88E6393_MISC_TEST_SAMPLES_MASK |
2643 MII_88E6393_MISC_TEST_RATE_MASK,
2644 MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE |
2645 MII_88E6393_MISC_TEST_SAMPLES_2048 |
2646 MII_88E6393_MISC_TEST_RATE_2_3MS);
2647 }
2648
marvell_hwmon_read(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long * temp)2649 static int marvell_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
2650 u32 attr, int channel, long *temp)
2651 {
2652 struct phy_device *phydev = dev_get_drvdata(dev);
2653 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2654 int err = -EOPNOTSUPP;
2655
2656 switch (attr) {
2657 case hwmon_temp_input:
2658 if (ops->get_temp)
2659 err = ops->get_temp(phydev, temp);
2660 break;
2661 case hwmon_temp_crit:
2662 if (ops->get_temp_critical)
2663 err = ops->get_temp_critical(phydev, temp);
2664 break;
2665 case hwmon_temp_max_alarm:
2666 if (ops->get_temp_alarm)
2667 err = ops->get_temp_alarm(phydev, temp);
2668 break;
2669 }
2670
2671 return err;
2672 }
2673
marvell_hwmon_write(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long temp)2674 static int marvell_hwmon_write(struct device *dev, enum hwmon_sensor_types type,
2675 u32 attr, int channel, long temp)
2676 {
2677 struct phy_device *phydev = dev_get_drvdata(dev);
2678 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2679 int err = -EOPNOTSUPP;
2680
2681 switch (attr) {
2682 case hwmon_temp_crit:
2683 if (ops->set_temp_critical)
2684 err = ops->set_temp_critical(phydev, temp);
2685 break;
2686 }
2687
2688 return err;
2689 }
2690
marvell_hwmon_is_visible(const void * data,enum hwmon_sensor_types type,u32 attr,int channel)2691 static umode_t marvell_hwmon_is_visible(const void *data,
2692 enum hwmon_sensor_types type,
2693 u32 attr, int channel)
2694 {
2695 const struct phy_device *phydev = data;
2696 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2697
2698 if (type != hwmon_temp)
2699 return 0;
2700
2701 switch (attr) {
2702 case hwmon_temp_input:
2703 return ops->get_temp ? 0444 : 0;
2704 case hwmon_temp_max_alarm:
2705 return ops->get_temp_alarm ? 0444 : 0;
2706 case hwmon_temp_crit:
2707 return (ops->get_temp_critical ? 0444 : 0) |
2708 (ops->set_temp_critical ? 0200 : 0);
2709 default:
2710 return 0;
2711 }
2712 }
2713
2714 static u32 marvell_hwmon_chip_config[] = {
2715 HWMON_C_REGISTER_TZ,
2716 0
2717 };
2718
2719 static const struct hwmon_channel_info marvell_hwmon_chip = {
2720 .type = hwmon_chip,
2721 .config = marvell_hwmon_chip_config,
2722 };
2723
2724 /* we can define HWMON_T_CRIT and HWMON_T_MAX_ALARM even though these are not
2725 * defined for all PHYs, because the hwmon code checks whether the attributes
2726 * exists via the .is_visible method
2727 */
2728 static u32 marvell_hwmon_temp_config[] = {
2729 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
2730 0
2731 };
2732
2733 static const struct hwmon_channel_info marvell_hwmon_temp = {
2734 .type = hwmon_temp,
2735 .config = marvell_hwmon_temp_config,
2736 };
2737
2738 static const struct hwmon_channel_info *marvell_hwmon_info[] = {
2739 &marvell_hwmon_chip,
2740 &marvell_hwmon_temp,
2741 NULL
2742 };
2743
2744 static const struct hwmon_ops marvell_hwmon_hwmon_ops = {
2745 .is_visible = marvell_hwmon_is_visible,
2746 .read = marvell_hwmon_read,
2747 .write = marvell_hwmon_write,
2748 };
2749
2750 static const struct hwmon_chip_info marvell_hwmon_chip_info = {
2751 .ops = &marvell_hwmon_hwmon_ops,
2752 .info = marvell_hwmon_info,
2753 };
2754
marvell_hwmon_name(struct phy_device * phydev)2755 static int marvell_hwmon_name(struct phy_device *phydev)
2756 {
2757 struct marvell_priv *priv = phydev->priv;
2758 struct device *dev = &phydev->mdio.dev;
2759 const char *devname = dev_name(dev);
2760 size_t len = strlen(devname);
2761 int i, j;
2762
2763 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
2764 if (!priv->hwmon_name)
2765 return -ENOMEM;
2766
2767 for (i = j = 0; i < len && devname[i]; i++) {
2768 if (isalnum(devname[i]))
2769 priv->hwmon_name[j++] = devname[i];
2770 }
2771
2772 return 0;
2773 }
2774
marvell_hwmon_probe(struct phy_device * phydev)2775 static int marvell_hwmon_probe(struct phy_device *phydev)
2776 {
2777 const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
2778 struct marvell_priv *priv = phydev->priv;
2779 struct device *dev = &phydev->mdio.dev;
2780 int err;
2781
2782 if (!ops)
2783 return 0;
2784
2785 err = marvell_hwmon_name(phydev);
2786 if (err)
2787 return err;
2788
2789 priv->hwmon_dev = devm_hwmon_device_register_with_info(
2790 dev, priv->hwmon_name, phydev, &marvell_hwmon_chip_info, NULL);
2791 if (IS_ERR(priv->hwmon_dev))
2792 return PTR_ERR(priv->hwmon_dev);
2793
2794 if (ops->config)
2795 err = ops->config(phydev);
2796
2797 return err;
2798 }
2799
2800 static const struct marvell_hwmon_ops m88e1121_hwmon_ops = {
2801 .get_temp = m88e1121_get_temp,
2802 };
2803
2804 static const struct marvell_hwmon_ops m88e1510_hwmon_ops = {
2805 .get_temp = m88e1510_get_temp,
2806 .get_temp_critical = m88e1510_get_temp_critical,
2807 .set_temp_critical = m88e1510_set_temp_critical,
2808 .get_temp_alarm = m88e1510_get_temp_alarm,
2809 };
2810
2811 static const struct marvell_hwmon_ops m88e6390_hwmon_ops = {
2812 .get_temp = m88e6390_get_temp,
2813 };
2814
2815 static const struct marvell_hwmon_ops m88e6393_hwmon_ops = {
2816 .config = m88e6393_hwmon_config,
2817 .get_temp = m88e6393_get_temp,
2818 .get_temp_critical = m88e6393_get_temp_critical,
2819 .set_temp_critical = m88e6393_set_temp_critical,
2820 .get_temp_alarm = m88e1510_get_temp_alarm,
2821 };
2822
2823 #define DEF_MARVELL_HWMON_OPS(s) (&(s))
2824
2825 #else
2826
2827 #define DEF_MARVELL_HWMON_OPS(s) NULL
2828
marvell_hwmon_probe(struct phy_device * phydev)2829 static int marvell_hwmon_probe(struct phy_device *phydev)
2830 {
2831 return 0;
2832 }
2833 #endif
2834
marvell_probe(struct phy_device * phydev)2835 static int marvell_probe(struct phy_device *phydev)
2836 {
2837 struct marvell_priv *priv;
2838
2839 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
2840 if (!priv)
2841 return -ENOMEM;
2842
2843 phydev->priv = priv;
2844
2845 return marvell_hwmon_probe(phydev);
2846 }
2847
m88e1510_sfp_insert(void * upstream,const struct sfp_eeprom_id * id)2848 static int m88e1510_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)
2849 {
2850 DECLARE_PHY_INTERFACE_MASK(interfaces);
2851 struct phy_device *phydev = upstream;
2852 phy_interface_t interface;
2853 struct device *dev;
2854 int oldpage;
2855 int ret = 0;
2856 u16 mode;
2857
2858 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, };
2859
2860 dev = &phydev->mdio.dev;
2861
2862 sfp_parse_support(phydev->sfp_bus, id, supported, interfaces);
2863 interface = sfp_select_interface(phydev->sfp_bus, supported);
2864
2865 dev_info(dev, "%s SFP module inserted\n", phy_modes(interface));
2866
2867 switch (interface) {
2868 case PHY_INTERFACE_MODE_1000BASEX:
2869 mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X;
2870
2871 break;
2872 case PHY_INTERFACE_MODE_100BASEX:
2873 mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX;
2874
2875 break;
2876 case PHY_INTERFACE_MODE_SGMII:
2877 mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII;
2878
2879 break;
2880 default:
2881 dev_err(dev, "Incompatible SFP module inserted\n");
2882
2883 return -EINVAL;
2884 }
2885
2886 oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE);
2887 if (oldpage < 0)
2888 goto error;
2889
2890 ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
2891 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, mode);
2892 if (ret < 0)
2893 goto error;
2894
2895 ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
2896 MII_88E1510_GEN_CTRL_REG_1_RESET);
2897
2898 error:
2899 return phy_restore_page(phydev, oldpage, ret);
2900 }
2901
m88e1510_sfp_remove(void * upstream)2902 static void m88e1510_sfp_remove(void *upstream)
2903 {
2904 struct phy_device *phydev = upstream;
2905 int oldpage;
2906 int ret = 0;
2907
2908 oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE);
2909 if (oldpage < 0)
2910 goto error;
2911
2912 ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
2913 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
2914 MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII);
2915 if (ret < 0)
2916 goto error;
2917
2918 ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
2919 MII_88E1510_GEN_CTRL_REG_1_RESET);
2920
2921 error:
2922 phy_restore_page(phydev, oldpage, ret);
2923 }
2924
2925 static const struct sfp_upstream_ops m88e1510_sfp_ops = {
2926 .module_insert = m88e1510_sfp_insert,
2927 .module_remove = m88e1510_sfp_remove,
2928 .attach = phy_sfp_attach,
2929 .detach = phy_sfp_detach,
2930 };
2931
m88e1510_probe(struct phy_device * phydev)2932 static int m88e1510_probe(struct phy_device *phydev)
2933 {
2934 int err;
2935
2936 err = marvell_probe(phydev);
2937 if (err)
2938 return err;
2939
2940 return phy_sfp_probe(phydev, &m88e1510_sfp_ops);
2941 }
2942
2943 static struct phy_driver marvell_drivers[] = {
2944 {
2945 .phy_id = MARVELL_PHY_ID_88E1101,
2946 .phy_id_mask = MARVELL_PHY_ID_MASK,
2947 .name = "Marvell 88E1101",
2948 /* PHY_GBIT_FEATURES */
2949 .probe = marvell_probe,
2950 .config_init = marvell_config_init,
2951 .config_aneg = m88e1101_config_aneg,
2952 .config_intr = marvell_config_intr,
2953 .handle_interrupt = marvell_handle_interrupt,
2954 .resume = genphy_resume,
2955 .suspend = genphy_suspend,
2956 .read_page = marvell_read_page,
2957 .write_page = marvell_write_page,
2958 .get_sset_count = marvell_get_sset_count,
2959 .get_strings = marvell_get_strings,
2960 .get_stats = marvell_get_stats,
2961 },
2962 {
2963 .phy_id = MARVELL_PHY_ID_88E1112,
2964 .phy_id_mask = MARVELL_PHY_ID_MASK,
2965 .name = "Marvell 88E1112",
2966 /* PHY_GBIT_FEATURES */
2967 .probe = marvell_probe,
2968 .config_init = m88e1112_config_init,
2969 .config_aneg = marvell_config_aneg,
2970 .config_intr = marvell_config_intr,
2971 .handle_interrupt = marvell_handle_interrupt,
2972 .resume = genphy_resume,
2973 .suspend = genphy_suspend,
2974 .read_page = marvell_read_page,
2975 .write_page = marvell_write_page,
2976 .get_sset_count = marvell_get_sset_count,
2977 .get_strings = marvell_get_strings,
2978 .get_stats = marvell_get_stats,
2979 .get_tunable = m88e1011_get_tunable,
2980 .set_tunable = m88e1011_set_tunable,
2981 },
2982 {
2983 .phy_id = MARVELL_PHY_ID_88E1111,
2984 .phy_id_mask = MARVELL_PHY_ID_MASK,
2985 .name = "Marvell 88E1111",
2986 /* PHY_GBIT_FEATURES */
2987 .probe = marvell_probe,
2988 .config_init = m88e1111gbe_config_init,
2989 .config_aneg = m88e1111_config_aneg,
2990 .read_status = marvell_read_status,
2991 .config_intr = marvell_config_intr,
2992 .handle_interrupt = marvell_handle_interrupt,
2993 .resume = genphy_resume,
2994 .suspend = genphy_suspend,
2995 .read_page = marvell_read_page,
2996 .write_page = marvell_write_page,
2997 .get_sset_count = marvell_get_sset_count,
2998 .get_strings = marvell_get_strings,
2999 .get_stats = marvell_get_stats,
3000 .get_tunable = m88e1111_get_tunable,
3001 .set_tunable = m88e1111_set_tunable,
3002 },
3003 {
3004 .phy_id = MARVELL_PHY_ID_88E1111_FINISAR,
3005 .phy_id_mask = MARVELL_PHY_ID_MASK,
3006 .name = "Marvell 88E1111 (Finisar)",
3007 /* PHY_GBIT_FEATURES */
3008 .probe = marvell_probe,
3009 .config_init = m88e1111gbe_config_init,
3010 .config_aneg = m88e1111_config_aneg,
3011 .read_status = marvell_read_status,
3012 .config_intr = marvell_config_intr,
3013 .handle_interrupt = marvell_handle_interrupt,
3014 .resume = genphy_resume,
3015 .suspend = genphy_suspend,
3016 .read_page = marvell_read_page,
3017 .write_page = marvell_write_page,
3018 .get_sset_count = marvell_get_sset_count,
3019 .get_strings = marvell_get_strings,
3020 .get_stats = marvell_get_stats,
3021 .get_tunable = m88e1111_get_tunable,
3022 .set_tunable = m88e1111_set_tunable,
3023 },
3024 {
3025 .phy_id = MARVELL_PHY_ID_88E1118,
3026 .phy_id_mask = MARVELL_PHY_ID_MASK,
3027 .name = "Marvell 88E1118",
3028 /* PHY_GBIT_FEATURES */
3029 .probe = marvell_probe,
3030 .config_init = m88e1118_config_init,
3031 .config_aneg = m88e1118_config_aneg,
3032 .config_intr = marvell_config_intr,
3033 .handle_interrupt = marvell_handle_interrupt,
3034 .resume = genphy_resume,
3035 .suspend = genphy_suspend,
3036 .read_page = marvell_read_page,
3037 .write_page = marvell_write_page,
3038 .get_sset_count = marvell_get_sset_count,
3039 .get_strings = marvell_get_strings,
3040 .get_stats = marvell_get_stats,
3041 },
3042 {
3043 .phy_id = MARVELL_PHY_ID_88E1121R,
3044 .phy_id_mask = MARVELL_PHY_ID_MASK,
3045 .name = "Marvell 88E1121R",
3046 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1121_hwmon_ops),
3047 /* PHY_GBIT_FEATURES */
3048 .probe = marvell_probe,
3049 .config_init = marvell_1011gbe_config_init,
3050 .config_aneg = m88e1121_config_aneg,
3051 .read_status = marvell_read_status,
3052 .config_intr = marvell_config_intr,
3053 .handle_interrupt = marvell_handle_interrupt,
3054 .resume = genphy_resume,
3055 .suspend = genphy_suspend,
3056 .read_page = marvell_read_page,
3057 .write_page = marvell_write_page,
3058 .get_sset_count = marvell_get_sset_count,
3059 .get_strings = marvell_get_strings,
3060 .get_stats = marvell_get_stats,
3061 .get_tunable = m88e1011_get_tunable,
3062 .set_tunable = m88e1011_set_tunable,
3063 },
3064 {
3065 .phy_id = MARVELL_PHY_ID_88E1318S,
3066 .phy_id_mask = MARVELL_PHY_ID_MASK,
3067 .name = "Marvell 88E1318S",
3068 /* PHY_GBIT_FEATURES */
3069 .probe = marvell_probe,
3070 .config_init = m88e1318_config_init,
3071 .config_aneg = m88e1318_config_aneg,
3072 .read_status = marvell_read_status,
3073 .config_intr = marvell_config_intr,
3074 .handle_interrupt = marvell_handle_interrupt,
3075 .get_wol = m88e1318_get_wol,
3076 .set_wol = m88e1318_set_wol,
3077 .resume = genphy_resume,
3078 .suspend = genphy_suspend,
3079 .read_page = marvell_read_page,
3080 .write_page = marvell_write_page,
3081 .get_sset_count = marvell_get_sset_count,
3082 .get_strings = marvell_get_strings,
3083 .get_stats = marvell_get_stats,
3084 },
3085 {
3086 .phy_id = MARVELL_PHY_ID_88E1145,
3087 .phy_id_mask = MARVELL_PHY_ID_MASK,
3088 .name = "Marvell 88E1145",
3089 /* PHY_GBIT_FEATURES */
3090 .probe = marvell_probe,
3091 .config_init = m88e1145_config_init,
3092 .config_aneg = m88e1101_config_aneg,
3093 .config_intr = marvell_config_intr,
3094 .handle_interrupt = marvell_handle_interrupt,
3095 .resume = genphy_resume,
3096 .suspend = genphy_suspend,
3097 .read_page = marvell_read_page,
3098 .write_page = marvell_write_page,
3099 .get_sset_count = marvell_get_sset_count,
3100 .get_strings = marvell_get_strings,
3101 .get_stats = marvell_get_stats,
3102 .get_tunable = m88e1111_get_tunable,
3103 .set_tunable = m88e1111_set_tunable,
3104 },
3105 {
3106 .phy_id = MARVELL_PHY_ID_88E1149R,
3107 .phy_id_mask = MARVELL_PHY_ID_MASK,
3108 .name = "Marvell 88E1149R",
3109 /* PHY_GBIT_FEATURES */
3110 .probe = marvell_probe,
3111 .config_init = m88e1149_config_init,
3112 .config_aneg = m88e1118_config_aneg,
3113 .config_intr = marvell_config_intr,
3114 .handle_interrupt = marvell_handle_interrupt,
3115 .resume = genphy_resume,
3116 .suspend = genphy_suspend,
3117 .read_page = marvell_read_page,
3118 .write_page = marvell_write_page,
3119 .get_sset_count = marvell_get_sset_count,
3120 .get_strings = marvell_get_strings,
3121 .get_stats = marvell_get_stats,
3122 },
3123 {
3124 .phy_id = MARVELL_PHY_ID_88E1240,
3125 .phy_id_mask = MARVELL_PHY_ID_MASK,
3126 .name = "Marvell 88E1240",
3127 /* PHY_GBIT_FEATURES */
3128 .probe = marvell_probe,
3129 .config_init = m88e1112_config_init,
3130 .config_aneg = marvell_config_aneg,
3131 .config_intr = marvell_config_intr,
3132 .handle_interrupt = marvell_handle_interrupt,
3133 .resume = genphy_resume,
3134 .suspend = genphy_suspend,
3135 .read_page = marvell_read_page,
3136 .write_page = marvell_write_page,
3137 .get_sset_count = marvell_get_sset_count,
3138 .get_strings = marvell_get_strings,
3139 .get_stats = marvell_get_stats,
3140 .get_tunable = m88e1011_get_tunable,
3141 .set_tunable = m88e1011_set_tunable,
3142 },
3143 {
3144 .phy_id = MARVELL_PHY_ID_88E1116R,
3145 .phy_id_mask = MARVELL_PHY_ID_MASK,
3146 .name = "Marvell 88E1116R",
3147 /* PHY_GBIT_FEATURES */
3148 .probe = marvell_probe,
3149 .config_init = m88e1116r_config_init,
3150 .config_intr = marvell_config_intr,
3151 .handle_interrupt = marvell_handle_interrupt,
3152 .resume = genphy_resume,
3153 .suspend = genphy_suspend,
3154 .read_page = marvell_read_page,
3155 .write_page = marvell_write_page,
3156 .get_sset_count = marvell_get_sset_count,
3157 .get_strings = marvell_get_strings,
3158 .get_stats = marvell_get_stats,
3159 .get_tunable = m88e1011_get_tunable,
3160 .set_tunable = m88e1011_set_tunable,
3161 },
3162 {
3163 .phy_id = MARVELL_PHY_ID_88E1510,
3164 .phy_id_mask = MARVELL_PHY_ID_MASK,
3165 .name = "Marvell 88E1510",
3166 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3167 .features = PHY_GBIT_FIBRE_FEATURES,
3168 .flags = PHY_POLL_CABLE_TEST,
3169 .probe = m88e1510_probe,
3170 .config_init = m88e1510_config_init,
3171 .config_aneg = m88e1510_config_aneg,
3172 .read_status = marvell_read_status,
3173 .config_intr = marvell_config_intr,
3174 .handle_interrupt = marvell_handle_interrupt,
3175 .get_wol = m88e1318_get_wol,
3176 .set_wol = m88e1318_set_wol,
3177 .resume = marvell_resume,
3178 .suspend = marvell_suspend,
3179 .read_page = marvell_read_page,
3180 .write_page = marvell_write_page,
3181 .get_sset_count = marvell_get_sset_count,
3182 .get_strings = marvell_get_strings,
3183 .get_stats = marvell_get_stats,
3184 .set_loopback = m88e1510_loopback,
3185 .get_tunable = m88e1011_get_tunable,
3186 .set_tunable = m88e1011_set_tunable,
3187 .cable_test_start = marvell_vct7_cable_test_start,
3188 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3189 .cable_test_get_status = marvell_vct7_cable_test_get_status,
3190 },
3191 {
3192 .phy_id = MARVELL_PHY_ID_88E1540,
3193 .phy_id_mask = MARVELL_PHY_ID_MASK,
3194 .name = "Marvell 88E1540",
3195 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3196 /* PHY_GBIT_FEATURES */
3197 .flags = PHY_POLL_CABLE_TEST,
3198 .probe = marvell_probe,
3199 .config_init = marvell_1011gbe_config_init,
3200 .config_aneg = m88e1510_config_aneg,
3201 .read_status = marvell_read_status,
3202 .config_intr = marvell_config_intr,
3203 .handle_interrupt = marvell_handle_interrupt,
3204 .resume = genphy_resume,
3205 .suspend = genphy_suspend,
3206 .read_page = marvell_read_page,
3207 .write_page = marvell_write_page,
3208 .get_sset_count = marvell_get_sset_count,
3209 .get_strings = marvell_get_strings,
3210 .get_stats = marvell_get_stats,
3211 .get_tunable = m88e1540_get_tunable,
3212 .set_tunable = m88e1540_set_tunable,
3213 .cable_test_start = marvell_vct7_cable_test_start,
3214 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3215 .cable_test_get_status = marvell_vct7_cable_test_get_status,
3216 },
3217 {
3218 .phy_id = MARVELL_PHY_ID_88E1545,
3219 .phy_id_mask = MARVELL_PHY_ID_MASK,
3220 .name = "Marvell 88E1545",
3221 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3222 .probe = marvell_probe,
3223 /* PHY_GBIT_FEATURES */
3224 .flags = PHY_POLL_CABLE_TEST,
3225 .config_init = marvell_1011gbe_config_init,
3226 .config_aneg = m88e1510_config_aneg,
3227 .read_status = marvell_read_status,
3228 .config_intr = marvell_config_intr,
3229 .handle_interrupt = marvell_handle_interrupt,
3230 .resume = genphy_resume,
3231 .suspend = genphy_suspend,
3232 .read_page = marvell_read_page,
3233 .write_page = marvell_write_page,
3234 .get_sset_count = marvell_get_sset_count,
3235 .get_strings = marvell_get_strings,
3236 .get_stats = marvell_get_stats,
3237 .get_tunable = m88e1540_get_tunable,
3238 .set_tunable = m88e1540_set_tunable,
3239 .cable_test_start = marvell_vct7_cable_test_start,
3240 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3241 .cable_test_get_status = marvell_vct7_cable_test_get_status,
3242 },
3243 {
3244 .phy_id = MARVELL_PHY_ID_88E3016,
3245 .phy_id_mask = MARVELL_PHY_ID_MASK,
3246 .name = "Marvell 88E3016",
3247 /* PHY_BASIC_FEATURES */
3248 .probe = marvell_probe,
3249 .config_init = m88e3016_config_init,
3250 .aneg_done = marvell_aneg_done,
3251 .read_status = marvell_read_status,
3252 .config_intr = marvell_config_intr,
3253 .handle_interrupt = marvell_handle_interrupt,
3254 .resume = genphy_resume,
3255 .suspend = genphy_suspend,
3256 .read_page = marvell_read_page,
3257 .write_page = marvell_write_page,
3258 .get_sset_count = marvell_get_sset_count,
3259 .get_strings = marvell_get_strings,
3260 .get_stats = marvell_get_stats,
3261 },
3262 {
3263 .phy_id = MARVELL_PHY_ID_88E6341_FAMILY,
3264 .phy_id_mask = MARVELL_PHY_ID_MASK,
3265 .name = "Marvell 88E6341 Family",
3266 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3267 /* PHY_GBIT_FEATURES */
3268 .flags = PHY_POLL_CABLE_TEST,
3269 .probe = marvell_probe,
3270 .config_init = marvell_1011gbe_config_init,
3271 .config_aneg = m88e6390_config_aneg,
3272 .read_status = marvell_read_status,
3273 .config_intr = marvell_config_intr,
3274 .handle_interrupt = marvell_handle_interrupt,
3275 .resume = genphy_resume,
3276 .suspend = genphy_suspend,
3277 .read_page = marvell_read_page,
3278 .write_page = marvell_write_page,
3279 .get_sset_count = marvell_get_sset_count,
3280 .get_strings = marvell_get_strings,
3281 .get_stats = marvell_get_stats,
3282 .get_tunable = m88e1540_get_tunable,
3283 .set_tunable = m88e1540_set_tunable,
3284 .cable_test_start = marvell_vct7_cable_test_start,
3285 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3286 .cable_test_get_status = marvell_vct7_cable_test_get_status,
3287 },
3288 {
3289 .phy_id = MARVELL_PHY_ID_88E6390_FAMILY,
3290 .phy_id_mask = MARVELL_PHY_ID_MASK,
3291 .name = "Marvell 88E6390 Family",
3292 .driver_data = DEF_MARVELL_HWMON_OPS(m88e6390_hwmon_ops),
3293 /* PHY_GBIT_FEATURES */
3294 .flags = PHY_POLL_CABLE_TEST,
3295 .probe = marvell_probe,
3296 .config_init = marvell_1011gbe_config_init,
3297 .config_aneg = m88e6390_config_aneg,
3298 .read_status = marvell_read_status,
3299 .config_intr = marvell_config_intr,
3300 .handle_interrupt = marvell_handle_interrupt,
3301 .resume = genphy_resume,
3302 .suspend = genphy_suspend,
3303 .read_page = marvell_read_page,
3304 .write_page = marvell_write_page,
3305 .get_sset_count = marvell_get_sset_count,
3306 .get_strings = marvell_get_strings,
3307 .get_stats = marvell_get_stats,
3308 .get_tunable = m88e1540_get_tunable,
3309 .set_tunable = m88e1540_set_tunable,
3310 .cable_test_start = marvell_vct7_cable_test_start,
3311 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3312 .cable_test_get_status = marvell_vct7_cable_test_get_status,
3313 },
3314 {
3315 .phy_id = MARVELL_PHY_ID_88E6393_FAMILY,
3316 .phy_id_mask = MARVELL_PHY_ID_MASK,
3317 .name = "Marvell 88E6393 Family",
3318 .driver_data = DEF_MARVELL_HWMON_OPS(m88e6393_hwmon_ops),
3319 /* PHY_GBIT_FEATURES */
3320 .flags = PHY_POLL_CABLE_TEST,
3321 .probe = marvell_probe,
3322 .config_init = marvell_1011gbe_config_init,
3323 .config_aneg = m88e1510_config_aneg,
3324 .read_status = marvell_read_status,
3325 .config_intr = marvell_config_intr,
3326 .handle_interrupt = marvell_handle_interrupt,
3327 .resume = genphy_resume,
3328 .suspend = genphy_suspend,
3329 .read_page = marvell_read_page,
3330 .write_page = marvell_write_page,
3331 .get_sset_count = marvell_get_sset_count,
3332 .get_strings = marvell_get_strings,
3333 .get_stats = marvell_get_stats,
3334 .get_tunable = m88e1540_get_tunable,
3335 .set_tunable = m88e1540_set_tunable,
3336 .cable_test_start = marvell_vct7_cable_test_start,
3337 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
3338 .cable_test_get_status = marvell_vct7_cable_test_get_status,
3339 },
3340 {
3341 .phy_id = MARVELL_PHY_ID_88E1340S,
3342 .phy_id_mask = MARVELL_PHY_ID_MASK,
3343 .name = "Marvell 88E1340S",
3344 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3345 .probe = marvell_probe,
3346 /* PHY_GBIT_FEATURES */
3347 .config_init = marvell_1011gbe_config_init,
3348 .config_aneg = m88e1510_config_aneg,
3349 .read_status = marvell_read_status,
3350 .config_intr = marvell_config_intr,
3351 .handle_interrupt = marvell_handle_interrupt,
3352 .resume = genphy_resume,
3353 .suspend = genphy_suspend,
3354 .read_page = marvell_read_page,
3355 .write_page = marvell_write_page,
3356 .get_sset_count = marvell_get_sset_count,
3357 .get_strings = marvell_get_strings,
3358 .get_stats = marvell_get_stats,
3359 .get_tunable = m88e1540_get_tunable,
3360 .set_tunable = m88e1540_set_tunable,
3361 },
3362 {
3363 .phy_id = MARVELL_PHY_ID_88E1548P,
3364 .phy_id_mask = MARVELL_PHY_ID_MASK,
3365 .name = "Marvell 88E1548P",
3366 .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
3367 .probe = marvell_probe,
3368 .features = PHY_GBIT_FIBRE_FEATURES,
3369 .config_init = marvell_1011gbe_config_init,
3370 .config_aneg = m88e1510_config_aneg,
3371 .read_status = marvell_read_status,
3372 .config_intr = marvell_config_intr,
3373 .handle_interrupt = marvell_handle_interrupt,
3374 .resume = genphy_resume,
3375 .suspend = genphy_suspend,
3376 .read_page = marvell_read_page,
3377 .write_page = marvell_write_page,
3378 .get_sset_count = marvell_get_sset_count,
3379 .get_strings = marvell_get_strings,
3380 .get_stats = marvell_get_stats,
3381 .get_tunable = m88e1540_get_tunable,
3382 .set_tunable = m88e1540_set_tunable,
3383 },
3384 };
3385
3386 module_phy_driver(marvell_drivers);
3387
3388 static struct mdio_device_id __maybe_unused marvell_tbl[] = {
3389 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
3390 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
3391 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
3392 { MARVELL_PHY_ID_88E1111_FINISAR, MARVELL_PHY_ID_MASK },
3393 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
3394 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
3395 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
3396 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
3397 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
3398 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
3399 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
3400 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
3401 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
3402 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
3403 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
3404 { MARVELL_PHY_ID_88E6341_FAMILY, MARVELL_PHY_ID_MASK },
3405 { MARVELL_PHY_ID_88E6390_FAMILY, MARVELL_PHY_ID_MASK },
3406 { MARVELL_PHY_ID_88E6393_FAMILY, MARVELL_PHY_ID_MASK },
3407 { MARVELL_PHY_ID_88E1340S, MARVELL_PHY_ID_MASK },
3408 { MARVELL_PHY_ID_88E1548P, MARVELL_PHY_ID_MASK },
3409 { }
3410 };
3411
3412 MODULE_DEVICE_TABLE(mdio, marvell_tbl);
3413