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Searched refs:MC_SEQ_WR_CTL_D1 (Results 1 – 12 of 12) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/radeon/
Dbtcd.h112 #define MC_SEQ_WR_CTL_D1 0x28c0 macro
Dnid.h788 #define MC_SEQ_WR_CTL_D1 0x28c0 macro
Dbtc_dpm.c1879 case MC_SEQ_WR_CTL_D1 >> 2: in btc_check_s0_mc_reg_index()
2035 WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1)); in btc_initialize_mc_reg_table()
Dsid.h549 #define MC_SEQ_WR_CTL_D1 0x28c0 macro
Dcikd.h662 #define MC_SEQ_WR_CTL_D1 0x28c0 macro
Devergreend.h294 #define MC_SEQ_WR_CTL_D1 0x28c0 macro
Dci_dpm.c4412 case MC_SEQ_WR_CTL_D1 >> 2: in ci_check_s0_mc_reg_index()
4530 case MC_SEQ_WR_CTL_D1: in ci_register_patching_mc_seq()
4611 WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1)); in ci_initialize_mc_reg_table()
Dni_dpm.c2793 case MC_SEQ_WR_CTL_D1 >> 2: in ni_check_s0_mc_reg_index()
2890 WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1)); in ni_initialize_mc_reg_table()
Dcypress_dpm.c999 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_SEQ_WR_CTL_D1 >> 2; in cypress_set_mc_reg_address_table()
Dsi_dpm.c5432 case MC_SEQ_WR_CTL_D1 >> 2: in si_check_s0_mc_reg_index()
5533 WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1)); in si_initialize_mc_reg_table()
/Linux-v6.1/drivers/gpu/drm/amd/amdgpu/
Dsid.h550 #define MC_SEQ_WR_CTL_D1 0xA30 macro
/Linux-v6.1/drivers/gpu/drm/amd/pm/legacy-dpm/
Dsi_dpm.c5925 case MC_SEQ_WR_CTL_D1: in si_check_s0_mc_reg_index()
6026 WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1)); in si_initialize_mc_reg_table()