Searched refs:JZ4760_CLK_PLL0 (Results 1 – 2 of 2) sorted by relevance
| /Linux-v6.1/drivers/clk/ingenic/ |
| D | jz4760-cgu.c | 94 [JZ4760_CLK_PLL0] = {
151 .parents = { JZ4760_CLK_PLL0, },
159 .parents = { JZ4760_CLK_PLL0, },
167 .parents = { JZ4760_CLK_PLL0, },
175 .parents = { JZ4760_CLK_PLL0, },
188 .parents = { JZ4760_CLK_PLL0, },
196 .parents = { JZ4760_CLK_PLL0, },
207 .parents = { JZ4760_CLK_PLL0 },
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| /Linux-v6.1/include/dt-bindings/clock/ |
| D | ingenic,jz4760-cgu.h | 11 #define JZ4760_CLK_PLL0 2 macro
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