Searched refs:IXGBE_MSCA_ADDR_CYCLE (Results 1 – 2 of 2) sorted by relevance
484 (IXGBE_MSCA_ADDR_CYCLE | IXGBE_MSCA_MDI_COMMAND)); in ixgbe_read_phy_reg_mdi()588 (IXGBE_MSCA_ADDR_CYCLE | IXGBE_MSCA_MDI_COMMAND)); in ixgbe_write_phy_reg_mdi()701 cmd = hwaddr | IXGBE_MSCA_ADDR_CYCLE | IXGBE_MSCA_MDI_COMMAND; in ixgbe_mii_bus_read_generic()754 cmd = hwaddr | IXGBE_MSCA_ADDR_CYCLE | IXGBE_MSCA_MDI_COMMAND; in ixgbe_mii_bus_write_generic()
1304 #define IXGBE_MSCA_ADDR_CYCLE 0x00000000 /* OP CODE 00 (addr cycle) */ macro