Searched refs:IVR (Results 1 – 8 of 8) sorted by relevance
29 #define IVR 0x18 /* Interrupt Vector Register */ macro145 u32 hwirq = xintc_read(irqc, IVR); in xil_intc_irq_handler()160 hwirq = xintc_read(primary_intc, IVR); in xil_intc_handle_irq()
191 methods is requesting SOC integrated VR (IVR) switching frequency to a193 radio channels. OEM or ODMs can use the driver to control SOC IVR194 operation within the range where it does not impact IVR performance.197 at the data rates. Similar to IVR control mechanism, Intel offers a
176 IVR = 0x40; /* Set DragonBall IVR (interrupt base) to 64 */ in init_IRQ()
37 #define IVR 0x1A /* Interrupt Vector */ macro
37 #define IVR 0x60 /* Interrupt Vector Register */ macro
200 #define IVR BYTE_REF(IVR_ADDR) macro
238 #define IVR BYTE_REF(IVR_ADDR) macro
202 #define IVR BYTE_REF(IVR_ADDR) macro
