Searched refs:IS_ROCKETLAKE (Results 1 – 24 of 24) sorted by relevance
101 !IS_ROCKETLAKE(dev_priv)); in intel_pch_type()125 !IS_ROCKETLAKE(dev_priv) && in intel_pch_type()178 else if (IS_TIGERLAKE(dev_priv) || IS_ROCKETLAKE(dev_priv)) in intel_virt_detect_pch()
612 #define IS_ROCKETLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_ROCKETLAKE) macro719 (IS_ROCKETLAKE(p) && IS_DISPLAY_STEP(p, since, until))970 #define HAS_D12_PLANE_MINIMIZATION(dev_priv) (IS_ROCKETLAKE(dev_priv) || \
177 } else if (IS_ROCKETLAKE(i915)) { in intel_step_init()
155 IS_ROCKETLAKE(i915) || in has_phy_misc()223 else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) in phy_is_master()
228 if (IS_ROCKETLAKE(dev_priv)) { in icl_get_qgv_points()637 else if (IS_ROCKETLAKE(dev_priv)) in intel_bw_init_hw()
2199 } else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) { in map_ddc_pin()2457 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) in dvo_port_to_port()3607 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) in intel_bios_port_aux_ch()3617 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915)) in intel_bios_port_aux_ch()
920 } else if (IS_ROCKETLAKE(dev_priv)) { in intel_dmc_ucode_init()
570 if (DISPLAY_VER(i915) == 12 && !IS_ROCKETLAKE(i915) && pipe == PIPE_A) in intel_dsc_power_domain()
3254 } else if (IS_ROCKETLAKE(dev_priv)) { in icl_get_combo_phy_dpll()3585 } else if (IS_ROCKETLAKE(dev_priv)) { in icl_pll_get_hw_state()3648 } else if (IS_ROCKETLAKE(dev_priv)) { in icl_dpll_write()4200 else if (IS_ROCKETLAKE(dev_priv)) in intel_shared_dpll_init()
1623 } else if (IS_ROCKETLAKE(i915)) { in intel_ddi_buf_trans_init()
1579 else if (IS_ROCKETLAKE(i915)) in intel_display_power_map_init()
1355 if ((IS_TIGERLAKE(dev_priv) || IS_ROCKETLAKE(dev_priv)) && in i915_audio_component_init()
4361 } else if (IS_ROCKETLAKE(dev_priv)) { in intel_ddi_init()4434 else if (IS_ROCKETLAKE(dev_priv)) in intel_ddi_init()
858 if (IS_ROCKETLAKE(dev_priv) || IS_ALDERLAKE_S(dev_priv) || in intel_psr2_config_valid()
2177 if (IS_DG1(i915) || IS_ROCKETLAKE(i915) || in gen12_plane_has_mc_ccs()
3206 } else if (IS_ROCKETLAKE(dev_priv)) { in intel_init_cdclk_hooks()
2861 else if (IS_ROCKETLAKE(dev_priv)) in intel_hdmi_ddc_pin()
2092 else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) in intel_phy_is_combo()2144 else if ((IS_DG1(i915) || IS_ROCKETLAKE(i915)) && port >= PORT_TC1) in intel_port_to_phy()7926 } else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) { in intel_setup_outputs()
478 IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) in intel_dp_set_source_rates()
2254 IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) { in rcs_engine_wa_init()2269 IS_DG1(i915) || IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) { in rcs_engine_wa_init()2283 IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) { in rcs_engine_wa_init()2296 IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915) || IS_ALDERLAKE_P(i915)) { in rcs_engine_wa_init()2313 if (IS_DG1(i915) || IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915) || in rcs_engine_wa_init()
478 } else if (IS_TIGERLAKE(i915) || IS_ROCKETLAKE(i915)) { in get_mocs_settings()
1040 IS_ROCKETLAKE(i915) || in mmio_invalidate_full()
35 if (IS_TIGERLAKE(i915) || IS_ROCKETLAKE(i915)) { in uc_expand_default_options()
497 !IS_ROCKETLAKE(i915) && !IS_ALDERLAKE_S(i915)) { in set_proto_ctx_engines_bond()